glsl: Add a lowering pass for 64-bit integer multiplication
v2: Rename lower_64bit.cpp and lower_64bit_test.cpp to lower_int64. Suggested by Matt. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Ian Romanick
@@ -73,6 +73,7 @@ glsl_tests_general_ir_test_SOURCES = \
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glsl/tests/builtin_variable_test.cpp \
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glsl/tests/invalidate_locations_test.cpp \
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glsl/tests/general_ir_test.cpp \
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glsl/tests/lower_int64_test.cpp \
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glsl/tests/opt_add_neg_to_sub_test.cpp \
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glsl/tests/varyings_test.cpp
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glsl_tests_general_ir_test_CFLAGS = \
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@@ -91,6 +91,7 @@ LIBGLSL_FILES = \
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glsl/lower_distance.cpp \
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glsl/lower_if_to_cond_assign.cpp \
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glsl/lower_instructions.cpp \
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glsl/lower_int64.cpp \
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glsl/lower_jumps.cpp \
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glsl/lower_mat_op_to_vec.cpp \
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glsl/lower_noise.cpp \
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@@ -50,6 +50,9 @@
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#define FIND_MSB_TO_FLOAT_CAST 0x40000
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#define IMUL_HIGH_TO_MUL 0x80000
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/* Opertaions for lower_64bit_integer_instructions() */
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#define MUL64 (1U << 0)
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/**
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* \see class lower_packing_builtins_visitor
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*/
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@@ -162,3 +165,6 @@ void propagate_invariance(exec_list *instructions);
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ir_rvalue *
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compare_index_block(exec_list *instructions, ir_variable *index,
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unsigned base, unsigned components, void *mem_ctx);
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bool lower_64bit_integer_instructions(exec_list *instructions,
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unsigned what_to_lower);
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374
src/compiler/glsl/lower_int64.cpp
Normal file
374
src/compiler/glsl/lower_int64.cpp
Normal file
@@ -0,0 +1,374 @@
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/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* \file lower_int64.cpp
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*
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* Lower 64-bit operations to 32-bit operations. Each 64-bit value is lowered
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* to a uvec2. For each operation that can be lowered, there is a function
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* called __builtin_foo with the same number of parameters that takes uvec2
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* sources and produces uvec2 results. An operation like
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*
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* uint64_t(x) * uint64_t(y)
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*
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* becomes
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*
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* packUint2x32(__builtin_umul64(unpackUint2x32(x), unpackUint2x32(y)));
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*/
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#include "main/macros.h"
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#include "compiler/glsl_types.h"
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#include "ir.h"
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#include "ir_rvalue_visitor.h"
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#include "ir_builder.h"
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#include "ir_optimization.h"
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#include "util/hash_table.h"
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#include "builtin_functions.h"
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typedef ir_function_signature *(*function_generator)(void *mem_ctx,
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builtin_available_predicate avail);
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using namespace ir_builder;
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namespace lower_64bit {
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void expand_source(ir_factory &, ir_rvalue *val, ir_variable **expanded_src);
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ir_dereference_variable *compact_destination(ir_factory &,
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const glsl_type *type,
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ir_variable *result[4]);
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ir_rvalue *lower_op_to_function_call(ir_instruction *base_ir,
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ir_expression *ir,
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ir_function_signature *callee);
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};
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using namespace lower_64bit;
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namespace {
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class lower_64bit_visitor : public ir_rvalue_visitor {
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public:
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lower_64bit_visitor(void *mem_ctx, exec_list *instructions, unsigned lower)
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: progress(false), lower(lower), instructions(instructions),
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function_list(), added_functions(&function_list, mem_ctx)
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{
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functions = _mesa_hash_table_create(mem_ctx,
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_mesa_key_hash_string,
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_mesa_key_string_equal);
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foreach_in_list(ir_instruction, node, instructions) {
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ir_function *const f = node->as_function();
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if (f == NULL || strncmp(f->name, "__builtin_", 10) != 0)
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continue;
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add_function(f);
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}
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}
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~lower_64bit_visitor()
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{
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_mesa_hash_table_destroy(functions, NULL);
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}
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void handle_rvalue(ir_rvalue **rvalue);
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void add_function(ir_function *f)
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{
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_mesa_hash_table_insert(functions, f->name, f);
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}
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ir_function *find_function(const char *name)
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{
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struct hash_entry *const entry =
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_mesa_hash_table_search(functions, name);
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return entry != NULL ? (ir_function *) entry->data : NULL;
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}
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bool progress;
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private:
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unsigned lower; /** Bitfield of which operations to lower */
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exec_list *instructions;
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/** Hashtable containing all of the known functions in the IR */
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struct hash_table *functions;
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public:
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exec_list function_list;
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private:
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ir_factory added_functions;
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ir_rvalue *handle_op(ir_expression *ir, const char *function_name,
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function_generator generator);
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};
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} /* anonymous namespace */
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static bool
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is_integer_64(const glsl_type *t)
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{
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return t->base_type == GLSL_TYPE_UINT64 || t->base_type == GLSL_TYPE_INT64;
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}
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/**
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* Determine if a particular type of lowering should occur
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*/
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#define lowering(x) (this->lower & x)
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bool
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lower_64bit_integer_instructions(exec_list *instructions,
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unsigned what_to_lower)
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{
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if (instructions->is_empty())
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return false;
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ir_instruction *first_inst = (ir_instruction *) instructions->get_head_raw();
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void *const mem_ctx = ralloc_parent(first_inst);
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lower_64bit_visitor v(mem_ctx, instructions, what_to_lower);
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visit_list_elements(&v, instructions);
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if (v.progress && !v.function_list.is_empty()) {
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/* Move all of the nodes from function_list to the head if the incoming
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* instruction list.
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*/
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exec_node *const after = &instructions->head_sentinel;
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exec_node *const before = instructions->head_sentinel.next;
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exec_node *const head = v.function_list.head_sentinel.next;
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exec_node *const tail = v.function_list.tail_sentinel.prev;
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before->next = head;
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head->prev = before;
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after->prev = tail;
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tail->next = after;
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}
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return v.progress;
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}
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/**
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* Expand individual 64-bit values to uvec2 values
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*
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* Each operation is in one of a few forms.
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*
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* vector op vector
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* vector op scalar
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* scalar op vector
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* scalar op scalar
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*
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* In the 'vector op vector' case, the two vectors must have the same size.
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* In a way, the 'scalar op scalar' form is special case of the 'vector op
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* vector' form.
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*
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* This method generates a new set of uvec2 values for each element of a
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* single operand. If the operand is a scalar, the uvec2 is replicated
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* multiple times. A value like
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*
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* u64vec3(a) + u64vec3(b)
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*
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* becomes
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*
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* u64vec3 tmp0 = u64vec3(a) + u64vec3(b);
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* uvec2 tmp1 = unpackUint2x32(tmp0.x);
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* uvec2 tmp2 = unpackUint2x32(tmp0.y);
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* uvec2 tmp3 = unpackUint2x32(tmp0.z);
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*
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* and the returned operands array contains ir_variable pointers to
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*
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* { tmp1, tmp2, tmp3, tmp1 }
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*/
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void
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lower_64bit::expand_source(ir_factory &body,
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ir_rvalue *val,
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ir_variable **expanded_src)
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{
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assert(val->type->base_type == GLSL_TYPE_UINT64 ||
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val->type->base_type == GLSL_TYPE_INT64);
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ir_variable *const temp = body.make_temp(val->type, "tmp");
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body.emit(assign(temp, val));
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const ir_expression_operation unpack_opcode =
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val->type->base_type == GLSL_TYPE_UINT64
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? ir_unop_unpack_uint_2x32 : ir_unop_unpack_int_2x32;
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const glsl_type *const type =
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val->type->base_type == GLSL_TYPE_UINT64
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? glsl_type::uvec2_type : glsl_type::ivec2_type;
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unsigned i;
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for (i = 0; i < val->type->vector_elements; i++) {
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expanded_src[i] = body.make_temp(type, "expanded_64bit_source");
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body.emit(assign(expanded_src[i],
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expr(unpack_opcode, swizzle(temp, i, 1))));
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}
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for (/* empty */; i < 4; i++)
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expanded_src[i] = expanded_src[0];
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}
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/**
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* Convert a series of uvec2 results into a single 64-bit integer vector
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*/
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ir_dereference_variable *
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lower_64bit::compact_destination(ir_factory &body,
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const glsl_type *type,
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ir_variable *result[4])
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{
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const ir_expression_operation pack_opcode =
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type->base_type == GLSL_TYPE_UINT64
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? ir_unop_pack_uint_2x32 : ir_unop_pack_int_2x32;
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ir_variable *const compacted_result =
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body.make_temp(type, "compacted_64bit_result");
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for (unsigned i = 0; i < type->vector_elements; i++) {
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body.emit(assign(compacted_result,
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expr(pack_opcode, result[i]),
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1U << i));
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}
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void *const mem_ctx = ralloc_parent(compacted_result);
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return new(mem_ctx) ir_dereference_variable(compacted_result);
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}
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ir_rvalue *
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lower_64bit::lower_op_to_function_call(ir_instruction *base_ir,
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ir_expression *ir,
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ir_function_signature *callee)
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{
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const unsigned num_operands = ir->get_num_operands();
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ir_variable *src[4][4];
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ir_variable *dst[4];
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void *const mem_ctx = ralloc_parent(ir);
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exec_list instructions;
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unsigned source_components = 0;
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const glsl_type *const result_type =
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ir->type->base_type == GLSL_TYPE_UINT64
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? glsl_type::uvec2_type : glsl_type::ivec2_type;
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ir_factory body(&instructions, mem_ctx);
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for (unsigned i = 0; i < num_operands; i++) {
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expand_source(body, ir->operands[i], src[i]);
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if (ir->operands[i]->type->vector_elements > source_components)
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source_components = ir->operands[i]->type->vector_elements;
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}
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for (unsigned i = 0; i < source_components; i++) {
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dst[i] = body.make_temp(result_type, "expanded_64bit_result");
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exec_list parameters;
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for (unsigned j = 0; j < num_operands; j++)
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parameters.push_tail(new(mem_ctx) ir_dereference_variable(src[j][i]));
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ir_dereference_variable *const return_deref =
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new(mem_ctx) ir_dereference_variable(dst[i]);
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ir_call *const c = new(mem_ctx) ir_call(callee,
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return_deref,
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¶meters);
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body.emit(c);
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}
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ir_rvalue *const rv = compact_destination(body, ir->type, dst);
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/* Move all of the nodes from instructions between base_ir and the
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* instruction before it.
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*/
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exec_node *const after = base_ir;
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exec_node *const before = after->prev;
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exec_node *const head = instructions.head_sentinel.next;
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exec_node *const tail = instructions.tail_sentinel.prev;
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before->next = head;
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head->prev = before;
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after->prev = tail;
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tail->next = after;
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return rv;
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}
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ir_rvalue *
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lower_64bit_visitor::handle_op(ir_expression *ir,
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const char *function_name,
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function_generator generator)
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{
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for (unsigned i = 0; i < ir->get_num_operands(); i++)
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if (!is_integer_64(ir->operands[i]->type))
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return ir;
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/* Get a handle to the correct ir_function_signature for the core
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* operation.
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*/
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ir_function_signature *callee = NULL;
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ir_function *f = find_function(function_name);
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if (f != NULL) {
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callee = (ir_function_signature *) f->signatures.get_head();
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assert(callee != NULL && callee->ir_type == ir_type_function_signature);
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} else {
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f = new(base_ir) ir_function(function_name);
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callee = generator(base_ir, NULL);
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f->add_signature(callee);
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add_function(f);
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}
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return lower_op_to_function_call(this->base_ir, ir, callee);
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}
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void
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lower_64bit_visitor::handle_rvalue(ir_rvalue **rvalue)
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{
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if (*rvalue == NULL || (*rvalue)->ir_type != ir_type_expression)
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return;
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ir_expression *const ir = (*rvalue)->as_expression();
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assert(ir != NULL);
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switch (ir->operation) {
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case ir_binop_mul:
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if (lowering(MUL64)) {
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*rvalue = handle_op(ir, "__builtin_umul64", generate_ir::umul64);
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this->progress = true;
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}
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break;
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default:
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break;
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}
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}
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440
src/compiler/glsl/tests/lower_int64_test.cpp
Normal file
440
src/compiler/glsl/tests/lower_int64_test.cpp
Normal file
@@ -0,0 +1,440 @@
|
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/*
|
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* Copyright © 2013 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
#include <gtest/gtest.h>
|
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#include "main/compiler.h"
|
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#include "main/mtypes.h"
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#include "main/macros.h"
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#include "ir.h"
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#include "ir_builder.h"
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using namespace ir_builder;
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namespace lower_64bit {
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void expand_source(ir_factory &body,
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ir_rvalue *val,
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ir_variable **expanded_src);
|
||||
|
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ir_dereference_variable *compact_destination(ir_factory &body,
|
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const glsl_type *type,
|
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ir_variable *result[4]);
|
||||
|
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ir_rvalue *lower_op_to_function_call(ir_instruction *base_ir,
|
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ir_expression *ir,
|
||||
ir_function_signature *callee);
|
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};
|
||||
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class expand_source : public ::testing::Test {
|
||||
public:
|
||||
virtual void SetUp();
|
||||
virtual void TearDown();
|
||||
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||||
exec_list instructions;
|
||||
ir_factory *body;
|
||||
ir_variable *expanded_src[4];
|
||||
void *mem_ctx;
|
||||
};
|
||||
|
||||
void
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||||
expand_source::SetUp()
|
||||
{
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||||
mem_ctx = ralloc_context(NULL);
|
||||
|
||||
memset(expanded_src, 0, sizeof(expanded_src));
|
||||
instructions.make_empty();
|
||||
body = new ir_factory(&instructions, mem_ctx);
|
||||
}
|
||||
|
||||
void
|
||||
expand_source::TearDown()
|
||||
{
|
||||
delete body;
|
||||
body = NULL;
|
||||
|
||||
ralloc_free(mem_ctx);
|
||||
mem_ctx = NULL;
|
||||
}
|
||||
|
||||
static ir_dereference_variable *
|
||||
create_variable(void *mem_ctx, const glsl_type *type)
|
||||
{
|
||||
ir_variable *var = new(mem_ctx) ir_variable(type,
|
||||
"variable",
|
||||
ir_var_temporary);
|
||||
|
||||
return new(mem_ctx) ir_dereference_variable(var);
|
||||
}
|
||||
|
||||
static ir_expression *
|
||||
create_expression(void *mem_ctx, const glsl_type *type)
|
||||
{
|
||||
return new(mem_ctx) ir_expression(ir_unop_neg,
|
||||
create_variable(mem_ctx, type));
|
||||
}
|
||||
|
||||
static void
|
||||
check_expanded_source(const glsl_type *type,
|
||||
ir_variable *expanded_src[4])
|
||||
{
|
||||
const glsl_type *const expanded_type =
|
||||
type->base_type == GLSL_TYPE_UINT64
|
||||
? glsl_type::uvec2_type :glsl_type::ivec2_type;
|
||||
|
||||
for (int i = 0; i < type->vector_elements; i++) {
|
||||
EXPECT_EQ(expanded_type, expanded_src[i]->type);
|
||||
|
||||
/* All elements that are part of the vector must be unique. */
|
||||
for (int j = i - 1; j >= 0; j--) {
|
||||
EXPECT_NE(expanded_src[i], expanded_src[j])
|
||||
<< " Element " << i << " is the same as element " << j;
|
||||
}
|
||||
}
|
||||
|
||||
/* All elements that are not part of the vector must be the same as element
|
||||
* 0. This is primarily for scalars (where every element is the same).
|
||||
*/
|
||||
for (int i = type->vector_elements; i < 4; i++) {
|
||||
EXPECT_EQ(expanded_src[0], expanded_src[i])
|
||||
<< " Element " << i << " should be the same as element 0";
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
check_instructions(exec_list *instructions,
|
||||
const glsl_type *type,
|
||||
const ir_instruction *source)
|
||||
{
|
||||
const glsl_type *const expanded_type =
|
||||
type->base_type == GLSL_TYPE_UINT64
|
||||
? glsl_type::uvec2_type : glsl_type::ivec2_type;
|
||||
|
||||
const ir_expression_operation unpack_opcode =
|
||||
type->base_type == GLSL_TYPE_UINT64
|
||||
? ir_unop_unpack_uint_2x32 : ir_unop_unpack_int_2x32;
|
||||
|
||||
ir_instruction *ir;
|
||||
|
||||
/* The instruction list should contain IR to represent:
|
||||
*
|
||||
* type tmp1;
|
||||
* tmp1 = source;
|
||||
* uvec2 tmp2;
|
||||
* tmp2 = unpackUint2x32(tmp1.x);
|
||||
* uvec2 tmp3;
|
||||
* tmp3 = unpackUint2x32(tmp1.y);
|
||||
* uvec2 tmp4;
|
||||
* tmp4 = unpackUint2x32(tmp1.z);
|
||||
* uvec2 tmp5;
|
||||
* tmp5 = unpackUint2x32(tmp1.w);
|
||||
*/
|
||||
ASSERT_FALSE(instructions->is_empty());
|
||||
ir = (ir_instruction *) instructions->pop_head();
|
||||
ir_variable *const tmp1 = ir->as_variable();
|
||||
EXPECT_EQ(ir_type_variable, ir->ir_type);
|
||||
EXPECT_EQ(type, tmp1->type) <<
|
||||
" Got " <<
|
||||
tmp1->type->name <<
|
||||
", expected " <<
|
||||
type->name;
|
||||
|
||||
ASSERT_FALSE(instructions->is_empty());
|
||||
ir = (ir_instruction *) instructions->pop_head();
|
||||
ir_assignment *const assign1 = ir->as_assignment();
|
||||
EXPECT_EQ(ir_type_assignment, ir->ir_type);
|
||||
ASSERT_NE((void *)0, assign1);
|
||||
EXPECT_EQ(tmp1, assign1->lhs->variable_referenced());
|
||||
EXPECT_EQ(source, assign1->rhs);
|
||||
|
||||
for (unsigned i = 0; i < type->vector_elements; i++) {
|
||||
ASSERT_FALSE(instructions->is_empty());
|
||||
ir = (ir_instruction *) instructions->pop_head();
|
||||
ir_variable *const tmp2 = ir->as_variable();
|
||||
EXPECT_EQ(ir_type_variable, ir->ir_type);
|
||||
EXPECT_EQ(expanded_type, tmp2->type);
|
||||
|
||||
ASSERT_FALSE(instructions->is_empty());
|
||||
ir = (ir_instruction *) instructions->pop_head();
|
||||
ir_assignment *const assign2 = ir->as_assignment();
|
||||
EXPECT_EQ(ir_type_assignment, ir->ir_type);
|
||||
ASSERT_NE((void *)0, assign2);
|
||||
EXPECT_EQ(tmp2, assign2->lhs->variable_referenced());
|
||||
ir_expression *unpack = assign2->rhs->as_expression();
|
||||
ASSERT_NE((void *)0, unpack);
|
||||
EXPECT_EQ(unpack_opcode, unpack->operation);
|
||||
EXPECT_EQ(tmp1, unpack->operands[0]->variable_referenced());
|
||||
}
|
||||
|
||||
EXPECT_TRUE(instructions->is_empty());
|
||||
}
|
||||
|
||||
TEST_F(expand_source, uint64_variable)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::uint64_t_type;
|
||||
ir_dereference_variable *const deref = create_variable(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, deref, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, deref);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, u64vec2_variable)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::u64vec2_type;
|
||||
ir_dereference_variable *const deref = create_variable(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, deref, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, deref);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, u64vec3_variable)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::u64vec3_type;
|
||||
|
||||
/* Generate an operand that is a scalar variable dereference. */
|
||||
ir_variable *const var = new(mem_ctx) ir_variable(type,
|
||||
"variable",
|
||||
ir_var_temporary);
|
||||
|
||||
ir_dereference_variable *const deref =
|
||||
new(mem_ctx) ir_dereference_variable(var);
|
||||
|
||||
lower_64bit::expand_source(*body, deref, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, deref);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, u64vec4_variable)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::u64vec4_type;
|
||||
ir_dereference_variable *const deref = create_variable(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, deref, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, deref);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, int64_variable)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::int64_t_type;
|
||||
ir_dereference_variable *const deref = create_variable(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, deref, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, deref);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, i64vec2_variable)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::i64vec2_type;
|
||||
ir_dereference_variable *const deref = create_variable(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, deref, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, deref);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, i64vec3_variable)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::i64vec3_type;
|
||||
ir_dereference_variable *const deref = create_variable(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, deref, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, deref);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, i64vec4_variable)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::i64vec4_type;
|
||||
ir_dereference_variable *const deref = create_variable(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, deref, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, deref);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, uint64_expression)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::uint64_t_type;
|
||||
ir_expression *const expr = create_expression(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, expr, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, expr);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, u64vec2_expression)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::u64vec2_type;
|
||||
ir_expression *const expr = create_expression(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, expr, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, expr);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, u64vec3_expression)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::u64vec3_type;
|
||||
ir_expression *const expr = create_expression(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, expr, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, expr);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, u64vec4_expression)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::u64vec4_type;
|
||||
ir_expression *const expr = create_expression(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, expr, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, expr);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, int64_expression)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::int64_t_type;
|
||||
ir_expression *const expr = create_expression(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, expr, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, expr);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, i64vec2_expression)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::i64vec2_type;
|
||||
ir_expression *const expr = create_expression(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, expr, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, expr);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, i64vec3_expression)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::i64vec3_type;
|
||||
ir_expression *const expr = create_expression(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, expr, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, expr);
|
||||
}
|
||||
|
||||
TEST_F(expand_source, i64vec4_expression)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::i64vec4_type;
|
||||
ir_expression *const expr = create_expression(mem_ctx, type);
|
||||
|
||||
lower_64bit::expand_source(*body, expr, expanded_src);
|
||||
|
||||
check_expanded_source(type, expanded_src);
|
||||
check_instructions(&instructions, type, expr);
|
||||
}
|
||||
|
||||
class compact_destination : public ::testing::Test {
|
||||
public:
|
||||
virtual void SetUp();
|
||||
virtual void TearDown();
|
||||
|
||||
exec_list instructions;
|
||||
ir_factory *body;
|
||||
ir_variable *expanded_src[4];
|
||||
void *mem_ctx;
|
||||
};
|
||||
|
||||
void
|
||||
compact_destination::SetUp()
|
||||
{
|
||||
mem_ctx = ralloc_context(NULL);
|
||||
|
||||
memset(expanded_src, 0, sizeof(expanded_src));
|
||||
instructions.make_empty();
|
||||
body = new ir_factory(&instructions, mem_ctx);
|
||||
}
|
||||
|
||||
void
|
||||
compact_destination::TearDown()
|
||||
{
|
||||
delete body;
|
||||
body = NULL;
|
||||
|
||||
ralloc_free(mem_ctx);
|
||||
mem_ctx = NULL;
|
||||
}
|
||||
|
||||
TEST_F(compact_destination, uint64)
|
||||
{
|
||||
const glsl_type *const type = glsl_type::uint64_t_type;
|
||||
|
||||
for (unsigned i = 0; i < type->vector_elements; i++) {
|
||||
expanded_src[i] = new(mem_ctx) ir_variable(glsl_type::uvec2_type,
|
||||
"result",
|
||||
ir_var_temporary);
|
||||
}
|
||||
|
||||
ir_dereference_variable *deref =
|
||||
lower_64bit::compact_destination(*body,
|
||||
type,
|
||||
expanded_src);
|
||||
|
||||
ASSERT_EQ(ir_type_dereference_variable, deref->ir_type);
|
||||
EXPECT_EQ(type, deref->var->type) <<
|
||||
" Got " <<
|
||||
deref->var->type->name <<
|
||||
", expected " <<
|
||||
type->name;
|
||||
|
||||
ir_instruction *ir;
|
||||
|
||||
ASSERT_FALSE(instructions.is_empty());
|
||||
ir = (ir_instruction *) instructions.pop_head();
|
||||
ir_variable *const var = ir->as_variable();
|
||||
ASSERT_NE((void *)0, var);
|
||||
EXPECT_EQ(deref->var, var);
|
||||
|
||||
for (unsigned i = 0; i < type->vector_elements; i++) {
|
||||
ASSERT_FALSE(instructions.is_empty());
|
||||
ir = (ir_instruction *) instructions.pop_head();
|
||||
ir_assignment *const assign = ir->as_assignment();
|
||||
ASSERT_NE((void *)0, assign);
|
||||
EXPECT_EQ(deref->var, assign->lhs->variable_referenced());
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user