OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

nir: Document a bit about how align_mul/offset work.

Browse Source 
Introduces a #define for the maximum valid align_mul that's used in the
load_store_vectorizer tests (currently, though it will be used more soon).

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
This commit is contained in:
Eric Anholt
2020-09-08 13:07:56 -07:00
committed by Marge Bot
parent bd60e31c83
commit 6c1c571440
2 changed files with 14 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
src/compiler/nir/nir.h
View File

@@ -1718,10 +1718,14 @@ typedef enum {
* Alignment for offsets and addresses * Alignment for offsets and addresses
* *
* These two parameters, specify an alignment in terms of a multiplier and * These two parameters, specify an alignment in terms of a multiplier and
* an offset. The offset or address parameter X of the intrinsic is * an offset. The multiplier is always a power of two. The offset or
* guaranteed to satisfy the following: * address parameter X of the intrinsic is guaranteed to satisfy the
* following:
* *
* (X - align_offset) % align_mul == 0 * (X - align_offset) % align_mul == 0
*
* For constant offset values, align_mul will be NIR_ALIGN_MUL_MAX and the
* align_offset will be modulo that.
*/ */
NIR_INTRINSIC_ALIGN_MUL, NIR_INTRINSIC_ALIGN_MUL,
NIR_INTRINSIC_ALIGN_OFFSET, NIR_INTRINSIC_ALIGN_OFFSET,
@@ -1778,6 +1782,13 @@ typedef enum {
} nir_intrinsic_index_flag; } nir_intrinsic_index_flag;
/**
* Maximum valid value for a nir align_mul value (in intrinsics or derefs).
*
* Offsets can be signed, so this is the largest power of two in int32_t.
*/
#define NIR_ALIGN_MUL_MAX 0x40000000
typedef struct { typedef struct {
unsigned location:7; /* gl_vert_attrib, gl_varying_slot, or gl_frag_result */ unsigned location:7; /* gl_vert_attrib, gl_varying_slot, or gl_frag_result */
unsigned num_slots:6; /* max 32, may be pessimistic with const indexing */ unsigned num_slots:6; /* max 32, may be pessimistic with const indexing */

2
src/compiler/nir/tests/load_store_vectorizer_tests.cpp
View File

@@ -1875,6 +1875,6 @@ TEST_F(nir_load_store_vectorize_test, ubo_alignment_const_100)
create_indirect_load(nir_var_mem_ubo, 0, nir_imm_int(b, 100), 0x1); create_indirect_load(nir_var_mem_ubo, 0, nir_imm_int(b, 100), 0x1);
EXPECT_TRUE(run_vectorizer(nir_var_mem_ubo)); EXPECT_TRUE(run_vectorizer(nir_var_mem_ubo));
EXPECT_EQ(nir_intrinsic_align_mul(load), 0x40000000); EXPECT_EQ(nir_intrinsic_align_mul(load), NIR_ALIGN_MUL_MAX);
EXPECT_EQ(nir_intrinsic_align_offset(load), 100); EXPECT_EQ(nir_intrinsic_align_offset(load), 100);
} }