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intel/fs: Don't stomp f0.1 in SIMD16 ballot

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In fragment shaders f0.1 is used for discards so doing ballot after a
discard can potentially cause the discard to not happen.  However, we
don't support SIMD32 fragment shaders yet so this isn't a problem.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
This commit is contained in:
Jason Ekstrand
2017-09-06 18:37:34 -07:00
parent def013a863
commit 6c00240bc6
1 changed files with 9 additions and 2 deletions
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11
src/intel/compiler/brw_fs_nir.cpp
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@@ -4264,8 +4264,15 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
case nir_intrinsic_ballot: { case nir_intrinsic_ballot: {
const fs_reg value = retype(get_nir_src(instr->src[0]), const fs_reg value = retype(get_nir_src(instr->src[0]),
BRW_REGISTER_TYPE_UD); BRW_REGISTER_TYPE_UD);
const struct brw_reg flag = retype(brw_flag_reg(0, 0), struct brw_reg flag = brw_flag_reg(0, 0);
BRW_REGISTER_TYPE_UD); /* FIXME: For SIMD32 programs, this causes us to stomp on f0.1 as well
* as f0.0. This is a problem for fragment programs as we currently use
* f0.1 for discards. Fortunately, we don't support SIMD32 fragment
* programs yet so this isn't a problem. When we do, something will
* have to change.
*/
if (dispatch_width == 32)
flag.type = BRW_REGISTER_TYPE_UD;
bld.exec_all().MOV(flag, brw_imm_ud(0u)); bld.exec_all().MOV(flag, brw_imm_ud(0u));
bld.CMP(bld.null_reg_ud(), value, brw_imm_ud(0u), BRW_CONDITIONAL_NZ); bld.CMP(bld.null_reg_ud(), value, brw_imm_ud(0u), BRW_CONDITIONAL_NZ);