nvk: Rip out old UAPI support
This was mostly generated by unifdef -DNVK_NEW_UAPI=1 -m src/nouveau/**/*.h with a few manual fixups for device features and to remove includes and strip out the meson bits. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25357>
This commit is contained in:

committed by
Marge Bot

parent
31883b1f5e
commit
6af617095b
@@ -278,12 +278,6 @@ with_any_intel = [
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].contains(true)
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with_any_nouveau = with_gallium_nouveau or with_nouveau_vk
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if with_nouveau_vk and get_option('nvk-legacy-uapi')
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pre_args += '-DNVK_NEW_UAPI=0'
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else
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pre_args += '-DNVK_NEW_UAPI=1'
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endif
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if with_swrast_vk and not with_gallium_softpipe
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error('swrast vulkan requires gallium swrast')
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endif
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@@ -681,10 +681,3 @@ option (
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value : 'disabled',
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description: 'Enable Intel Xe KMD support.'
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)
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option(
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'nvk-legacy-uapi',
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type : 'boolean',
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value : 'false',
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description : 'Build support for legacy kernel uAPI.'
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)
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@@ -31,9 +31,7 @@ mme_runner::~mme_runner()
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mme_hw_runner::mme_hw_runner() :
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mme_runner(), p(NULL), dev(NULL), ctx(NULL),
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data_bo(NULL), push_bo(NULL),
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#if NVK_NEW_UAPI == 1
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syncobj(0),
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#endif
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push_map(NULL)
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{
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memset(&push, 0, sizeof(push));
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@@ -48,10 +46,8 @@ mme_runner::mme_store_data(mme_builder *b, uint32_t dw_idx,
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mme_hw_runner::~mme_hw_runner()
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{
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#if NVK_NEW_UAPI == 1
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if (syncobj)
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drmSyncobjDestroy(dev->fd, syncobj);
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#endif
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if (push_bo) {
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nouveau_ws_bo_unmap(push_bo, push_map);
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nouveau_ws_bo_destroy(push_bo);
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@@ -116,11 +112,9 @@ mme_hw_runner::set_up_hw(uint16_t min_cls, uint16_t max_cls)
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if (push_bo == NULL)
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return false;
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#if NVK_NEW_UAPI == 1
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ret = drmSyncobjCreate(dev->fd, 0, &syncobj);
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if (ret < 0)
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return false;
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#endif
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reset_push();
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@@ -143,7 +137,6 @@ mme_hw_runner::reset_push()
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void
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mme_hw_runner::submit_push()
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{
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#if NVK_NEW_UAPI == 1
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struct drm_nouveau_exec_push push = {
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.va = push_bo->offset,
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.va_len = (uint32_t)nv_push_dw_count(&this->push) * 4,
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@@ -170,42 +163,6 @@ mme_hw_runner::submit_push()
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ret = drmSyncobjWait(dev->fd, &syncobj, 1, INT64_MAX,
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DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT, NULL);
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ASSERT_EQ(ret, 0);
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#else
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struct drm_nouveau_gem_pushbuf_bo bos[2];
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memset(bos, 0, sizeof(bos));
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bos[0].handle = push_bo->handle,
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bos[0].valid_domains = NOUVEAU_GEM_DOMAIN_GART;
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bos[0].read_domains = NOUVEAU_GEM_DOMAIN_GART;
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bos[1].handle = data_bo->handle,
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bos[1].valid_domains = NOUVEAU_GEM_DOMAIN_GART;
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bos[1].read_domains = NOUVEAU_GEM_DOMAIN_GART;
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bos[1].write_domains = NOUVEAU_GEM_DOMAIN_GART;
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struct drm_nouveau_gem_pushbuf_push push;
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memset(&push, 0, sizeof(push));
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push.bo_index = 0;
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push.offset = 0;
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push.length = nv_push_dw_count(&this->push) * 4;
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struct drm_nouveau_gem_pushbuf req;
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memset(&req, 0, sizeof(req));
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req.channel = ctx->channel;
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req.nr_buffers = 2;
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req.buffers = (uintptr_t)bos;
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req.nr_push = 1;
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req.push = (uintptr_t)&push;
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int ret = drmCommandWriteRead(dev->fd, DRM_NOUVEAU_GEM_PUSHBUF,
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&req, sizeof(req));
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ASSERT_EQ(ret, 0);
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bool ok = nouveau_ws_bo_wait(data_bo, NOUVEAU_WS_BO_RDWR);
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ASSERT_TRUE(ok);
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#endif
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}
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void
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@@ -53,9 +53,7 @@ private:
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struct nouveau_ws_context *ctx;
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struct nouveau_ws_bo *data_bo;
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struct nouveau_ws_bo *push_bo;
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#if NVK_NEW_UAPI == 1
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uint32_t syncobj;
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#endif
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void *push_map;
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struct nv_push push;
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};
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@@ -60,13 +60,6 @@ nvk_files = files(
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'nvk_wsi.h'
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)
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if get_option('nvk-legacy-uapi')
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nvk_files += files(
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'nvk_bo_sync.c',
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'nvk_bo_sync.h',
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)
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endif
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nvk_entrypoints = custom_target(
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'nvk_entrypoints',
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input : [vk_entrypoints_gen, vk_api_xml],
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@@ -1,281 +0,0 @@
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/*
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* Copyright © 2021 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nvk_bo_sync.h"
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#include "nouveau_bo.h"
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#include "nvk_device.h"
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#include "nvk_device_memory.h"
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#include "nvk_physical_device.h"
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#include "util/os_time.h"
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#include "util/timespec.h"
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#include <poll.h>
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static struct nvk_bo_sync *
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to_nvk_bo_sync(struct vk_sync *sync)
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{
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assert(sync->type == &nvk_bo_sync_type);
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return container_of(sync, struct nvk_bo_sync, sync);
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}
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static VkResult
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nvk_bo_sync_init(struct vk_device *vk_dev,
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struct vk_sync *vk_sync,
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uint64_t initial_value)
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{
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struct nvk_device *dev = container_of(vk_dev, struct nvk_device, vk);
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struct nvk_bo_sync *sync = to_nvk_bo_sync(vk_sync);
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sync->state = initial_value ? NVK_BO_SYNC_STATE_SIGNALED :
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NVK_BO_SYNC_STATE_RESET;
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sync->bo = nouveau_ws_bo_new(dev->ws_dev, 0x1000, 0,
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NOUVEAU_WS_BO_GART);
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if (!sync->bo)
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return vk_error(dev, VK_ERROR_OUT_OF_HOST_MEMORY);
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int err = nouveau_ws_bo_dma_buf(sync->bo, &sync->dmabuf_fd);
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if (err) {
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nouveau_ws_bo_destroy(sync->bo);
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return vk_errorf(dev, VK_ERROR_UNKNOWN, "dma-buf export failed: %m");
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}
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return VK_SUCCESS;
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}
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static void
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nvk_bo_sync_finish(struct vk_device *vk_dev,
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struct vk_sync *vk_sync)
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{
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struct nvk_bo_sync *sync = to_nvk_bo_sync(vk_sync);
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close(sync->dmabuf_fd);
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nouveau_ws_bo_destroy(sync->bo);
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}
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static VkResult
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nvk_bo_sync_reset(struct vk_device *vk_dev,
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struct vk_sync *vk_sync)
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{
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struct nvk_bo_sync *sync = to_nvk_bo_sync(vk_sync);
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sync->state = NVK_BO_SYNC_STATE_RESET;
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return VK_SUCCESS;
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}
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static int64_t
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nvk_get_relative_timeout(uint64_t abs_timeout)
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{
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uint64_t now = os_time_get_nano();
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/* We don't want negative timeouts.
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*
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* DRM_IOCTL_I915_GEM_WAIT uses a signed 64 bit timeout and is
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* supposed to block indefinitely timeouts < 0. Unfortunately,
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* this was broken for a couple of kernel releases. Since there's
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* no way to know whether or not the kernel we're using is one of
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* the broken ones, the best we can do is to clamp the timeout to
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* INT64_MAX. This limits the maximum timeout from 584 years to
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* 292 years - likely not a big deal.
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*/
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if (abs_timeout < now)
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return 0;
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uint64_t rel_timeout = abs_timeout - now;
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if (rel_timeout > (uint64_t)INT64_MAX)
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rel_timeout = INT64_MAX;
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return rel_timeout;
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}
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static VkResult
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nvk_wait_dmabuf(struct nvk_device *dev, int dmabuf_fd,
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uint64_t abs_timeout_ns)
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{
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const uint64_t now = os_time_get_nano();
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const uint64_t rel_timeout_ns =
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now < abs_timeout_ns ? abs_timeout_ns - now : 0;
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struct timespec rel_timeout_ts = {
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.tv_sec = rel_timeout_ns / 1000000000,
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.tv_nsec = rel_timeout_ns % 1000000000,
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};
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struct pollfd fd = {
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.fd = dmabuf_fd,
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.events = POLLOUT
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};
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int ret = ppoll(&fd, 1, &rel_timeout_ts, NULL);
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if (ret < 0) {
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return vk_errorf(dev, VK_ERROR_UNKNOWN, "poll() failed: %m");
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} else if (ret == 0) {
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return VK_TIMEOUT;
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} else {
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return VK_SUCCESS;
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}
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}
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static VkResult
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nvk_bo_sync_wait(struct vk_device *vk_dev,
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uint32_t wait_count,
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const struct vk_sync_wait *waits,
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enum vk_sync_wait_flags wait_flags,
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uint64_t abs_timeout_ns)
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{
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struct nvk_device *dev = container_of(vk_dev, struct nvk_device, vk);
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VkResult result;
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uint32_t pending = wait_count;
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while (pending) {
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pending = 0;
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bool signaled = false;
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for (uint32_t i = 0; i < wait_count; i++) {
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struct nvk_bo_sync *sync = to_nvk_bo_sync(waits[i].sync);
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switch (sync->state) {
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case NVK_BO_SYNC_STATE_RESET:
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/* This fence hasn't been submitted yet, we'll catch it the next
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* time around. Yes, this may mean we dead-loop but, short of
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* lots of locking and a condition variable, there's not much that
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* we can do about that.
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*/
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assert(!(wait_flags & VK_SYNC_WAIT_PENDING));
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pending++;
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continue;
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case NVK_BO_SYNC_STATE_SIGNALED:
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/* This fence is not pending. If waitAll isn't set, we can return
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* early. Otherwise, we have to keep going.
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*/
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if (wait_flags & VK_SYNC_WAIT_ANY)
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return VK_SUCCESS;
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continue;
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case NVK_BO_SYNC_STATE_SUBMITTED:
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/* These are the fences we really care about. Go ahead and wait
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* on it until we hit a timeout.
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*/
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if (!(wait_flags & VK_SYNC_WAIT_PENDING)) {
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result = nvk_wait_dmabuf(dev, sync->dmabuf_fd, abs_timeout_ns);
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/* This also covers VK_TIMEOUT */
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if (result != VK_SUCCESS)
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return result;
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sync->state = NVK_BO_SYNC_STATE_SIGNALED;
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signaled = true;
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}
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if (wait_flags & VK_SYNC_WAIT_ANY)
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return VK_SUCCESS;
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break;
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default:
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unreachable("Invalid BO sync state");
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}
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}
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if (pending && !signaled) {
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/* If we've hit this then someone decided to vkWaitForFences before
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* they've actually submitted any of them to a queue. This is a
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* fairly pessimal case, so it's ok to lock here and use a standard
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* pthreads condition variable.
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*/
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pthread_mutex_lock(&dev->mutex);
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/* It's possible that some of the fences have changed state since the
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* last time we checked. Now that we have the lock, check for
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* pending fences again and don't wait if it's changed.
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*/
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uint32_t now_pending = 0;
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for (uint32_t i = 0; i < wait_count; i++) {
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struct nvk_bo_sync *sync = to_nvk_bo_sync(waits[i].sync);
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if (sync->state == NVK_BO_SYNC_STATE_RESET)
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now_pending++;
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}
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assert(now_pending <= pending);
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if (now_pending == pending) {
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struct timespec abstime = {
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.tv_sec = abs_timeout_ns / NSEC_PER_SEC,
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.tv_nsec = abs_timeout_ns % NSEC_PER_SEC,
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};
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ASSERTED int ret;
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ret = pthread_cond_timedwait(&dev->queue_submit,
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&dev->mutex, &abstime);
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assert(ret != EINVAL);
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if (os_time_get_nano() >= abs_timeout_ns) {
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pthread_mutex_unlock(&dev->mutex);
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return VK_TIMEOUT;
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}
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}
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pthread_mutex_unlock(&dev->mutex);
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}
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}
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return VK_SUCCESS;
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}
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const struct vk_sync_type nvk_bo_sync_type = {
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.size = sizeof(struct nvk_bo_sync),
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.features = VK_SYNC_FEATURE_BINARY |
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VK_SYNC_FEATURE_GPU_WAIT |
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VK_SYNC_FEATURE_GPU_MULTI_WAIT |
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VK_SYNC_FEATURE_CPU_WAIT |
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VK_SYNC_FEATURE_CPU_RESET |
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VK_SYNC_FEATURE_WAIT_ANY |
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VK_SYNC_FEATURE_WAIT_PENDING,
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.init = nvk_bo_sync_init,
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.finish = nvk_bo_sync_finish,
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.reset = nvk_bo_sync_reset,
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.wait_many = nvk_bo_sync_wait,
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};
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VKAPI_ATTR VkResult VKAPI_CALL
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nvk_create_sync_for_memory(struct vk_device *vk_dev,
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VkDeviceMemory memory,
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bool signal_memory,
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struct vk_sync **sync_out)
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{
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VK_FROM_HANDLE(nvk_device_memory, mem, memory);
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struct nvk_bo_sync *bo_sync;
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bo_sync = vk_zalloc(&vk_dev->alloc, sizeof(*bo_sync), 8,
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VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
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if (bo_sync == NULL)
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return vk_error(vk_dev, VK_ERROR_OUT_OF_HOST_MEMORY);
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bo_sync->sync.type = &nvk_bo_sync_type;
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bo_sync->state = signal_memory ? NVK_BO_SYNC_STATE_RESET :
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NVK_BO_SYNC_STATE_SUBMITTED;
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bo_sync->bo = mem->bo;
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nouveau_ws_bo_ref(mem->bo);
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*sync_out = &bo_sync->sync;
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return VK_SUCCESS;
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}
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@@ -1,34 +0,0 @@
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/*
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* Copyright © 2022 Collabora Ltd. and Red Hat Inc.
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* SPDX-License-Identifier: MIT
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*/
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#ifndef NVK_BO_SYNC_H
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#define NVK_BO_SYNC_H 1
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#include "nvk_private.h"
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#include "vulkan/runtime/vk_sync.h"
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extern const struct vk_sync_type nvk_bo_sync_type;
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enum nvk_bo_sync_state {
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NVK_BO_SYNC_STATE_RESET,
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NVK_BO_SYNC_STATE_SUBMITTED,
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NVK_BO_SYNC_STATE_SIGNALED,
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};
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struct nvk_bo_sync {
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struct vk_sync sync;
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enum nvk_bo_sync_state state;
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struct nouveau_ws_bo *bo;
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int dmabuf_fd;
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};
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VKAPI_ATTR VkResult VKAPI_CALL
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nvk_create_sync_for_memory(struct vk_device *device,
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VkDeviceMemory memory,
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bool signal_memory,
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struct vk_sync **sync_out);
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#endif /* NVK_BO_SYNC_H */
|
@@ -46,7 +46,6 @@ nvk_CreateBuffer(VkDevice device,
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if (!buffer)
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return vk_error(dev, VK_ERROR_OUT_OF_HOST_MEMORY);
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#if NVK_NEW_UAPI == 1
|
||||
if (buffer->vk.create_flags & VK_BUFFER_CREATE_SPARSE_BINDING_BIT) {
|
||||
const uint32_t alignment =
|
||||
nvk_get_buffer_alignment(&nvk_device_physical(dev)->info,
|
||||
@@ -61,7 +60,6 @@ nvk_CreateBuffer(VkDevice device,
|
||||
buffer->addr = nouveau_ws_alloc_vma(dev->ws_dev, buffer->vma_size_B,
|
||||
alignment, sparse_residency);
|
||||
}
|
||||
#endif
|
||||
|
||||
*pBuffer = nvk_buffer_to_handle(buffer);
|
||||
|
||||
@@ -79,7 +77,6 @@ nvk_DestroyBuffer(VkDevice device,
|
||||
if (!buffer)
|
||||
return;
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
if (buffer->vma_size_B > 0) {
|
||||
const bool sparse_residency =
|
||||
buffer->vk.create_flags & VK_BUFFER_CREATE_SPARSE_RESIDENCY_BIT;
|
||||
@@ -88,7 +85,6 @@ nvk_DestroyBuffer(VkDevice device,
|
||||
nouveau_ws_free_vma(dev->ws_dev, buffer->addr, buffer->vma_size_B,
|
||||
sparse_residency);
|
||||
}
|
||||
#endif
|
||||
|
||||
vk_buffer_destroy(&dev->vk, pAllocator, &buffer->vk);
|
||||
}
|
||||
@@ -182,7 +178,6 @@ nvk_BindBufferMemory2(VkDevice device,
|
||||
VK_FROM_HANDLE(nvk_buffer, buffer, pBindInfos[i].buffer);
|
||||
|
||||
buffer->is_local = !(mem->bo->flags & NOUVEAU_WS_BO_GART);
|
||||
#if NVK_NEW_UAPI == 1
|
||||
if (buffer->vma_size_B) {
|
||||
VK_FROM_HANDLE(nvk_device, dev, device);
|
||||
nouveau_ws_bo_bind_vma(dev->ws_dev,
|
||||
@@ -194,10 +189,6 @@ nvk_BindBufferMemory2(VkDevice device,
|
||||
} else {
|
||||
buffer->addr = mem->bo->offset + pBindInfos[i].memoryOffset;
|
||||
}
|
||||
#else
|
||||
buffer->mem = mem;
|
||||
buffer->addr = mem->bo->offset + pBindInfos[i].memoryOffset;
|
||||
#endif
|
||||
}
|
||||
return VK_SUCCESS;
|
||||
}
|
||||
|
@@ -23,12 +23,8 @@ struct nvk_buffer {
|
||||
struct vk_buffer vk;
|
||||
uint64_t addr;
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
/** Size of the reserved VMA range for sparse buffers, zero otherwise. */
|
||||
uint64_t vma_size_B;
|
||||
#else
|
||||
struct nvk_device_memory *mem;
|
||||
#endif
|
||||
bool is_local;
|
||||
};
|
||||
|
||||
|
@@ -132,12 +132,7 @@ nvk_cmd_buffer_flush_push(struct nvk_cmd_buffer *cmd)
|
||||
|
||||
struct nvk_cmd_push push = {
|
||||
.map = cmd->push.start,
|
||||
#if NVK_NEW_UAPI == 1
|
||||
.addr = cmd->push_bo->bo->offset + bo_offset,
|
||||
#else
|
||||
.bo = cmd->push_bo->bo,
|
||||
.bo_offset = bo_offset,
|
||||
#endif
|
||||
.range = nv_push_dw_count(&cmd->push) * 4,
|
||||
};
|
||||
util_dynarray_append(&cmd->pushes, struct nvk_cmd_push, push);
|
||||
@@ -173,22 +168,11 @@ nvk_cmd_buffer_push_indirect_buffer(struct nvk_cmd_buffer *cmd,
|
||||
|
||||
uint64_t addr = nvk_buffer_address(buffer, offset);
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
struct nvk_cmd_push push = {
|
||||
.addr = addr,
|
||||
.range = range,
|
||||
.no_prefetch = true,
|
||||
};
|
||||
#else
|
||||
struct nouveau_ws_bo *bo = buffer->mem->bo;
|
||||
uint64_t bo_offset = addr - bo->offset;
|
||||
struct nvk_cmd_push push = {
|
||||
.bo = bo,
|
||||
.bo_offset = bo_offset,
|
||||
.range = range,
|
||||
.no_prefetch = true,
|
||||
};
|
||||
#endif
|
||||
|
||||
util_dynarray_append(&cmd->pushes, struct nvk_cmd_push, push);
|
||||
}
|
||||
@@ -559,11 +543,7 @@ nvk_cmd_buffer_dump(struct nvk_cmd_buffer *cmd, FILE *fp)
|
||||
};
|
||||
vk_push_print(fp, &push, &dev->pdev->info);
|
||||
} else {
|
||||
#if NVK_NEW_UAPI == 1
|
||||
const uint64_t addr = p->addr;
|
||||
#else
|
||||
const uint64_t addr = p->bo->offset + p->bo_offset;
|
||||
#endif
|
||||
fprintf(fp, "<%u B of INDIRECT DATA at 0x%" PRIx64 ">\n",
|
||||
p->range, addr);
|
||||
}
|
||||
|
@@ -113,12 +113,7 @@ struct nvk_compute_state {
|
||||
|
||||
struct nvk_cmd_push {
|
||||
void *map;
|
||||
#if NVK_NEW_UAPI == 1
|
||||
uint64_t addr;
|
||||
#else
|
||||
struct nouveau_ws_bo *bo;
|
||||
uint64_t bo_offset;
|
||||
#endif
|
||||
uint32_t range;
|
||||
bool no_prefetch;
|
||||
};
|
||||
|
@@ -296,38 +296,15 @@ nvk_AllocateMemory(VkDevice device,
|
||||
struct nvk_device_memory *mem;
|
||||
VkResult result;
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
const VkMemoryDedicatedAllocateInfo *dedicated_info =
|
||||
vk_find_struct_const(pAllocateInfo->pNext,
|
||||
MEMORY_DEDICATED_ALLOCATE_INFO);
|
||||
#endif
|
||||
|
||||
struct nvk_memory_tiling_info *p_tile_info = NULL;
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
struct nvk_image_plane *dedicated_image_plane = NULL;
|
||||
struct nvk_memory_tiling_info tile_info;
|
||||
if (dedicated_info && dedicated_info->image != VK_NULL_HANDLE) {
|
||||
VK_FROM_HANDLE(nvk_image, image, dedicated_info->image);
|
||||
if (image->plane_count == 1 && image->planes[0].nil.pte_kind) {
|
||||
dedicated_image_plane = &image->planes[0];
|
||||
tile_info = (struct nvk_memory_tiling_info) {
|
||||
.tile_mode = image->planes[0].nil.tile_mode,
|
||||
.pte_kind = image->planes[0].nil.pte_kind,
|
||||
};
|
||||
p_tile_info = &tile_info;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
result = nvk_allocate_memory(dev, pAllocateInfo, p_tile_info,
|
||||
pAllocator, &mem);
|
||||
if (result != VK_SUCCESS)
|
||||
return result;
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
mem->dedicated_image_plane = dedicated_image_plane;
|
||||
#endif
|
||||
|
||||
*pMem = nvk_device_memory_to_handle(mem);
|
||||
|
||||
|
@@ -19,9 +19,6 @@ struct nvk_device_memory {
|
||||
|
||||
struct list_head link;
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
struct nvk_image_plane *dedicated_image_plane;
|
||||
#endif
|
||||
|
||||
struct nouveau_ws_bo *bo;
|
||||
|
||||
|
@@ -526,7 +526,6 @@ nvk_image_init(struct nvk_device *dev,
|
||||
return VK_SUCCESS;
|
||||
}
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
static VkResult
|
||||
nvk_image_plane_alloc_vma(struct nvk_device *dev,
|
||||
struct nvk_image_plane *plane,
|
||||
@@ -547,33 +546,7 @@ nvk_image_plane_alloc_vma(struct nvk_device *dev,
|
||||
|
||||
return VK_SUCCESS;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
static VkResult
|
||||
nvk_image_plane_alloc_internal(struct nvk_device *dev,
|
||||
struct nvk_image_plane *plane,
|
||||
const VkAllocationCallbacks *pAllocator)
|
||||
{
|
||||
if (plane->nil.pte_kind == 0)
|
||||
return VK_SUCCESS;
|
||||
|
||||
assert(dev->pdev->mem_heaps[0].flags &
|
||||
VK_MEMORY_HEAP_DEVICE_LOCAL_BIT);
|
||||
|
||||
const VkMemoryAllocateInfo alloc_info = {
|
||||
.sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO,
|
||||
.allocationSize = plane->nil.size_B,
|
||||
.memoryTypeIndex = 0,
|
||||
};
|
||||
const struct nvk_memory_tiling_info tile_info = {
|
||||
.tile_mode = plane->nil.tile_mode,
|
||||
.pte_kind = plane->nil.pte_kind,
|
||||
};
|
||||
return nvk_allocate_memory(dev, &alloc_info, &tile_info,
|
||||
pAllocator, &plane->internal);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void
|
||||
nvk_image_plane_finish(struct nvk_device *dev,
|
||||
@@ -581,7 +554,6 @@ nvk_image_plane_finish(struct nvk_device *dev,
|
||||
VkImageCreateFlags create_flags,
|
||||
const VkAllocationCallbacks *pAllocator)
|
||||
{
|
||||
#if NVK_NEW_UAPI == 1
|
||||
if (plane->vma_size_B) {
|
||||
const bool sparse_resident =
|
||||
create_flags & VK_IMAGE_CREATE_SPARSE_RESIDENCY_BIT;
|
||||
@@ -590,10 +562,6 @@ nvk_image_plane_finish(struct nvk_device *dev,
|
||||
nouveau_ws_free_vma(dev->ws_dev, plane->addr, plane->vma_size_B,
|
||||
sparse_resident);
|
||||
}
|
||||
#else
|
||||
if (plane->internal)
|
||||
nvk_free_memory(dev, plane->internal, pAllocator);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -635,13 +603,8 @@ nvk_CreateImage(VkDevice device,
|
||||
}
|
||||
|
||||
for (uint8_t plane = 0; plane < image->plane_count; plane++) {
|
||||
#if NVK_NEW_UAPI == 1
|
||||
result = nvk_image_plane_alloc_vma(dev, &image->planes[plane],
|
||||
image->vk.create_flags);
|
||||
#else
|
||||
result = nvk_image_plane_alloc_internal(dev, &image->planes[plane],
|
||||
pAllocator);
|
||||
#endif
|
||||
if (result != VK_SUCCESS) {
|
||||
nvk_image_finish(dev, image, pAllocator);
|
||||
vk_free2(&dev->vk.alloc, pAllocator, image);
|
||||
@@ -650,13 +613,8 @@ nvk_CreateImage(VkDevice device,
|
||||
}
|
||||
|
||||
if (image->stencil_copy_temp.nil.size_B > 0) {
|
||||
#if NVK_NEW_UAPI == 1
|
||||
result = nvk_image_plane_alloc_vma(dev, &image->stencil_copy_temp,
|
||||
image->vk.create_flags);
|
||||
#else
|
||||
result = nvk_image_plane_alloc_internal(dev, &image->stencil_copy_temp,
|
||||
pAllocator);
|
||||
#endif
|
||||
if (result != VK_SUCCESS) {
|
||||
nvk_image_finish(dev, image, pAllocator);
|
||||
vk_free2(&dev->vk.alloc, pAllocator, image);
|
||||
@@ -860,7 +818,6 @@ nvk_image_plane_bind(struct nvk_device *dev,
|
||||
{
|
||||
*offset_B = ALIGN_POT(*offset_B, plane->nil.align_B);
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
if (plane->vma_size_B) {
|
||||
nouveau_ws_bo_bind_vma(dev->ws_dev,
|
||||
mem->bo,
|
||||
@@ -872,16 +829,6 @@ nvk_image_plane_bind(struct nvk_device *dev,
|
||||
assert(plane->nil.pte_kind == 0);
|
||||
plane->addr = mem->bo->offset + *offset_B;
|
||||
}
|
||||
#else
|
||||
if (mem->dedicated_image_plane == plane) {
|
||||
assert(*offset_B == 0);
|
||||
plane->addr = mem->bo->offset;
|
||||
} else if (plane->internal != NULL) {
|
||||
plane->addr = plane->internal->bo->offset;
|
||||
} else {
|
||||
plane->addr = mem->bo->offset + *offset_B;
|
||||
}
|
||||
#endif
|
||||
|
||||
*offset_B += plane->nil.size_B;
|
||||
}
|
||||
|
@@ -30,13 +30,8 @@ struct nvk_image_plane {
|
||||
struct nil_image nil;
|
||||
uint64_t addr;
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
/** Size of the reserved VMA range for sparse images, zero otherwise. */
|
||||
uint64_t vma_size_B;
|
||||
#else
|
||||
/* Used for internal dedicated allocations */
|
||||
struct nvk_device_memory *internal;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct nvk_image {
|
||||
|
@@ -90,9 +90,9 @@ static const struct vk_instance_extension_table instance_extensions = {
|
||||
.EXT_acquire_xlib_display = true,
|
||||
#endif
|
||||
.KHR_device_group_creation = true,
|
||||
.KHR_external_fence_capabilities = NVK_NEW_UAPI,
|
||||
.KHR_external_fence_capabilities = true,
|
||||
.KHR_external_memory_capabilities = true,
|
||||
.KHR_external_semaphore_capabilities = NVK_NEW_UAPI,
|
||||
.KHR_external_semaphore_capabilities = true,
|
||||
.KHR_get_physical_device_properties2 = true,
|
||||
.EXT_debug_report = true,
|
||||
.EXT_debug_utils = true,
|
||||
|
@@ -4,7 +4,6 @@
|
||||
*/
|
||||
#include "nvk_physical_device.h"
|
||||
|
||||
#include "nvk_bo_sync.h"
|
||||
#include "nvk_buffer.h"
|
||||
#include "nvk_entrypoints.h"
|
||||
#include "nvk_format.h"
|
||||
@@ -63,12 +62,12 @@ nvk_get_device_extensions(const struct nv_device_info *info,
|
||||
.KHR_draw_indirect_count = info->cls_eng3d >= TURING_A,
|
||||
.KHR_driver_properties = true,
|
||||
.KHR_dynamic_rendering = true,
|
||||
.KHR_external_fence = NVK_NEW_UAPI,
|
||||
.KHR_external_fence_fd = NVK_NEW_UAPI,
|
||||
.KHR_external_fence = true,
|
||||
.KHR_external_fence_fd = true,
|
||||
.KHR_external_memory = true,
|
||||
.KHR_external_memory_fd = true,
|
||||
.KHR_external_semaphore = NVK_NEW_UAPI,
|
||||
.KHR_external_semaphore_fd = NVK_NEW_UAPI,
|
||||
.KHR_external_semaphore = true,
|
||||
.KHR_external_semaphore_fd = true,
|
||||
.KHR_format_feature_flags2 = true,
|
||||
.KHR_get_memory_requirements2 = true,
|
||||
.KHR_image_format_list = true,
|
||||
@@ -89,9 +88,7 @@ nvk_get_device_extensions(const struct nv_device_info *info,
|
||||
.KHR_shader_non_semantic_info = true,
|
||||
.KHR_spirv_1_4 = true,
|
||||
.KHR_storage_buffer_storage_class = true,
|
||||
#if NVK_NEW_UAPI == 1
|
||||
.KHR_timeline_semaphore = true,
|
||||
#endif
|
||||
#ifdef NVK_USE_WSI_PLATFORM
|
||||
.KHR_swapchain = true,
|
||||
.KHR_swapchain_mutable_format = true,
|
||||
@@ -188,10 +185,8 @@ nvk_get_device_features(const struct nv_device_info *info,
|
||||
/* TODO: shaderInt16 */
|
||||
/* TODO: shaderResourceResidency */
|
||||
.shaderResourceMinLod = true,
|
||||
#if NVK_NEW_UAPI == 1
|
||||
.sparseBinding = true,
|
||||
.sparseResidencyBuffer = info->cls_eng3d >= MAXWELL_A,
|
||||
#endif
|
||||
/* TODO: sparseResidency* */
|
||||
/* TODO: variableMultisampleRate */
|
||||
/* TODO: inheritedQueries */
|
||||
@@ -232,9 +227,7 @@ nvk_get_device_features(const struct nv_device_info *info,
|
||||
.uniformBufferStandardLayout = true,
|
||||
.separateDepthStencilLayouts = true,
|
||||
.hostQueryReset = true,
|
||||
#if NVK_NEW_UAPI == 1
|
||||
.timelineSemaphore = true,
|
||||
#endif
|
||||
.bufferDeviceAddress = true,
|
||||
.bufferDeviceAddressCaptureReplay = false,
|
||||
.bufferDeviceAddressMultiDevice = false,
|
||||
@@ -673,11 +666,9 @@ nvk_create_drm_physical_device(struct vk_instance *_instance,
|
||||
return vk_error(instance, VK_ERROR_INCOMPATIBLE_DRIVER);
|
||||
|
||||
const struct nv_device_info info = ws_dev->info;
|
||||
#if NVK_NEW_UAPI == 1
|
||||
const bool has_vm_bind = ws_dev->has_vm_bind;
|
||||
const struct vk_sync_type syncobj_sync_type =
|
||||
vk_drm_syncobj_get_type(ws_dev->fd);
|
||||
#endif
|
||||
|
||||
nouveau_ws_device_destroy(ws_dev);
|
||||
|
||||
@@ -694,12 +685,10 @@ nvk_create_drm_physical_device(struct vk_instance *_instance,
|
||||
info.device_name);
|
||||
}
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
if (!has_vm_bind) {
|
||||
return vk_errorf(instance, VK_ERROR_INCOMPATIBLE_DRIVER,
|
||||
"NVK Requires a Linux kernel version 6.6 or later");
|
||||
}
|
||||
#endif
|
||||
|
||||
if (!(drm_device->available_nodes & (1 << DRM_NODE_RENDER))) {
|
||||
return vk_errorf(instance, VK_ERROR_INITIALIZATION_FAILED,
|
||||
@@ -793,12 +782,8 @@ nvk_create_drm_physical_device(struct vk_instance *_instance,
|
||||
}
|
||||
|
||||
unsigned st_idx = 0;
|
||||
#if NVK_NEW_UAPI == 1
|
||||
pdev->syncobj_sync_type = syncobj_sync_type;
|
||||
pdev->sync_types[st_idx++] = &pdev->syncobj_sync_type;
|
||||
#else
|
||||
pdev->sync_types[st_idx++] = &nvk_bo_sync_type;
|
||||
#endif
|
||||
pdev->sync_types[st_idx++] = NULL;
|
||||
assert(st_idx <= ARRAY_SIZE(pdev->sync_types));
|
||||
pdev->vk.supported_sync_types = pdev->sync_types;
|
||||
@@ -870,9 +855,7 @@ nvk_GetPhysicalDeviceQueueFamilyProperties2(
|
||||
p->queueFamilyProperties.queueFlags = VK_QUEUE_GRAPHICS_BIT |
|
||||
VK_QUEUE_COMPUTE_BIT |
|
||||
VK_QUEUE_TRANSFER_BIT;
|
||||
#if NVK_NEW_UAPI == 1
|
||||
p->queueFamilyProperties.queueFlags |= VK_QUEUE_SPARSE_BINDING_BIT;
|
||||
#endif
|
||||
p->queueFamilyProperties.queueCount = 1;
|
||||
p->queueFamilyProperties.timestampValidBits = 64;
|
||||
p->queueFamilyProperties.minImageTransferGranularity = (VkExtent3D){1, 1, 1};
|
||||
|
@@ -326,36 +326,12 @@ nvk_queue_init(struct nvk_device *dev, struct nvk_queue *queue,
|
||||
nvk_queue_state_init(&queue->state);
|
||||
|
||||
queue->vk.driver_submit = nvk_queue_submit;
|
||||
#if NVK_NEW_UAPI == 1
|
||||
int err = drmSyncobjCreate(dev->ws_dev->fd, 0, &queue->syncobj_handle);
|
||||
if (err < 0) {
|
||||
result = vk_error(dev, VK_ERROR_OUT_OF_HOST_MEMORY);
|
||||
goto fail_init;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
void *empty_push_map;
|
||||
queue->empty_push = nouveau_ws_bo_new_mapped(dev->ws_dev, 4096, 0,
|
||||
NOUVEAU_WS_BO_GART |
|
||||
NOUVEAU_WS_BO_MAP |
|
||||
NOUVEAU_WS_BO_NO_SHARE,
|
||||
NOUVEAU_WS_BO_WR,
|
||||
&empty_push_map);
|
||||
if (queue->empty_push == NULL) {
|
||||
result = vk_error(dev, VK_ERROR_OUT_OF_DEVICE_MEMORY);
|
||||
goto fail_init;
|
||||
}
|
||||
|
||||
{
|
||||
struct nv_push push;
|
||||
nv_push_init(&push, empty_push_map, 2);
|
||||
P_MTHD(&push, NV90B5, NOP);
|
||||
P_NV90B5_NOP(&push, 0);
|
||||
queue->empty_push_dw_count = nv_push_dw_count(&push);
|
||||
}
|
||||
nouveau_ws_bo_unmap(queue->empty_push, empty_push_map);
|
||||
#endif
|
||||
|
||||
result = nvk_queue_init_context_draw_state(queue);
|
||||
if (result != VK_SUCCESS)
|
||||
@@ -364,9 +340,6 @@ nvk_queue_init(struct nvk_device *dev, struct nvk_queue *queue,
|
||||
return VK_SUCCESS;
|
||||
|
||||
fail_empty_push:
|
||||
#if NVK_NEW_UAPI == 0
|
||||
nouveau_ws_bo_destroy(queue->empty_push);
|
||||
#endif
|
||||
fail_init:
|
||||
vk_queue_finish(&queue->vk);
|
||||
|
||||
@@ -377,13 +350,8 @@ void
|
||||
nvk_queue_finish(struct nvk_device *dev, struct nvk_queue *queue)
|
||||
{
|
||||
nvk_queue_state_finish(dev, &queue->state);
|
||||
#if NVK_NEW_UAPI == 1
|
||||
ASSERTED int err = drmSyncobjDestroy(dev->ws_dev->fd, queue->syncobj_handle);
|
||||
assert(err == 0);
|
||||
#endif
|
||||
#if NVK_NEW_UAPI == 0
|
||||
nouveau_ws_bo_destroy(queue->empty_push);
|
||||
#endif
|
||||
vk_queue_finish(&queue->vk);
|
||||
}
|
||||
|
||||
|
@@ -49,10 +49,6 @@ struct nvk_queue {
|
||||
|
||||
struct nvk_queue_state state;
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
struct nouveau_ws_bo *empty_push;
|
||||
uint32_t empty_push_dw_count;
|
||||
#endif
|
||||
|
||||
uint32_t syncobj_handle;
|
||||
};
|
||||
|
@@ -4,7 +4,6 @@
|
||||
*/
|
||||
#include "nvk_queue.h"
|
||||
|
||||
#include "nvk_bo_sync.h"
|
||||
#include "nvk_cmd_buffer.h"
|
||||
#include "nvk_cmd_pool.h"
|
||||
#include "nvk_device.h"
|
||||
@@ -27,11 +26,6 @@
|
||||
|
||||
struct push_builder {
|
||||
struct nvk_device *dev;
|
||||
#if NVK_NEW_UAPI == 0
|
||||
struct drm_nouveau_gem_pushbuf_bo req_bo[NOUVEAU_GEM_MAX_BUFFERS];
|
||||
struct drm_nouveau_gem_pushbuf_push req_push[NOUVEAU_GEM_MAX_PUSH];
|
||||
struct drm_nouveau_gem_pushbuf req;
|
||||
#else
|
||||
struct drm_nouveau_sync req_wait[NVK_PUSH_MAX_SYNCS];
|
||||
struct drm_nouveau_sync req_sig[NVK_PUSH_MAX_SYNCS];
|
||||
struct drm_nouveau_exec_push req_push[NVK_PUSH_MAX_PUSH];
|
||||
@@ -39,7 +33,6 @@ struct push_builder {
|
||||
struct drm_nouveau_vm_bind vmbind;
|
||||
struct drm_nouveau_vm_bind_op bind_ops[NVK_PUSH_MAX_BINDS];
|
||||
bool is_vmbind;
|
||||
#endif
|
||||
};
|
||||
|
||||
static void
|
||||
@@ -47,16 +40,6 @@ push_builder_init(struct nvk_device *dev, struct push_builder *pb,
|
||||
bool is_vmbind)
|
||||
{
|
||||
pb->dev = dev;
|
||||
#if NVK_NEW_UAPI == 0
|
||||
assert(!is_vmbind);
|
||||
pb->req = (struct drm_nouveau_gem_pushbuf) {
|
||||
.channel = dev->ws_ctx->channel,
|
||||
.nr_buffers = 0,
|
||||
.buffers = (uintptr_t)&pb->req_bo,
|
||||
.nr_push = 0,
|
||||
.push = (uintptr_t)&pb->req_push,
|
||||
};
|
||||
#else
|
||||
pb->req = (struct drm_nouveau_exec) {
|
||||
.channel = dev->ws_ctx->channel,
|
||||
.push_count = 0,
|
||||
@@ -76,7 +59,6 @@ push_builder_init(struct nvk_device *dev, struct push_builder *pb,
|
||||
.sig_ptr = (uintptr_t)&pb->req_sig,
|
||||
};
|
||||
pb->is_vmbind = is_vmbind;
|
||||
#endif
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
@@ -84,45 +66,13 @@ push_add_bo(struct push_builder *pb,
|
||||
struct nouveau_ws_bo *bo,
|
||||
enum nouveau_ws_bo_map_flags flags)
|
||||
{
|
||||
#if NVK_NEW_UAPI == 0
|
||||
const uint32_t domain = (bo->flags & NOUVEAU_WS_BO_GART) ?
|
||||
NOUVEAU_GEM_DOMAIN_GART :
|
||||
pb->dev->ws_dev->local_mem_domain;
|
||||
|
||||
for (uint32_t i = 0; i < pb->req.nr_buffers; i++) {
|
||||
if (pb->req_bo[i].handle == bo->handle) {
|
||||
assert(pb->req_bo[i].valid_domains == domain);
|
||||
if (flags & NOUVEAU_WS_BO_RD)
|
||||
pb->req_bo[i].read_domains |= domain;
|
||||
if (flags & NOUVEAU_WS_BO_WR)
|
||||
pb->req_bo[i].write_domains |= domain;
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
assert(pb->req.nr_buffers < NOUVEAU_GEM_MAX_BUFFERS);
|
||||
const uint32_t i = pb->req.nr_buffers++;
|
||||
|
||||
pb->req_bo[i] = (struct drm_nouveau_gem_pushbuf_bo) {
|
||||
.handle = bo->handle,
|
||||
.valid_domains = domain,
|
||||
};
|
||||
if (flags & NOUVEAU_WS_BO_RD)
|
||||
pb->req_bo[i].read_domains |= domain;
|
||||
if (flags & NOUVEAU_WS_BO_WR)
|
||||
pb->req_bo[i].write_domains |= domain;
|
||||
|
||||
return i;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
push_add_sync_wait(struct push_builder *pb,
|
||||
struct vk_sync_wait *wait)
|
||||
{
|
||||
#if NVK_NEW_UAPI == 1
|
||||
struct vk_drm_syncobj *sync = vk_sync_as_drm_syncobj(wait->sync);
|
||||
assert(sync);
|
||||
assert(pb->req.wait_count < NVK_PUSH_MAX_SYNCS);
|
||||
@@ -132,19 +82,12 @@ push_add_sync_wait(struct push_builder *pb,
|
||||
.handle = sync->syncobj,
|
||||
.timeline_value = wait->wait_value,
|
||||
};
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
push_add_sync_signal(struct push_builder *pb,
|
||||
struct vk_sync_signal *sig)
|
||||
{
|
||||
#if NVK_NEW_UAPI == 0
|
||||
struct nvk_bo_sync *bo_sync =
|
||||
container_of(sig->sync, struct nvk_bo_sync, sync);
|
||||
|
||||
push_add_bo(pb, bo_sync->bo, NOUVEAU_WS_BO_RDWR);
|
||||
#else
|
||||
struct vk_drm_syncobj *sync = vk_sync_as_drm_syncobj(sig->sync);
|
||||
assert(sync);
|
||||
assert(pb->req.sig_count < NVK_PUSH_MAX_SYNCS);
|
||||
@@ -154,10 +97,8 @@ push_add_sync_signal(struct push_builder *pb,
|
||||
.handle = sync->syncobj,
|
||||
.timeline_value = sig->signal_value,
|
||||
};
|
||||
#endif
|
||||
}
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
static void
|
||||
push_add_buffer_bind(struct push_builder *pb,
|
||||
VkSparseBufferMemoryBindInfo *bind_info)
|
||||
@@ -265,9 +206,7 @@ push_add_image_opaque_bind(struct push_builder *pb,
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
static void
|
||||
push_add_push(struct push_builder *pb, uint64_t addr, uint32_t range,
|
||||
bool no_prefetch)
|
||||
@@ -291,35 +230,14 @@ push_add_push(struct push_builder *pb, uint64_t addr, uint32_t range,
|
||||
.flags = flags,
|
||||
};
|
||||
}
|
||||
#endif
|
||||
|
||||
static void
|
||||
push_add_push_bo(struct push_builder *pb, struct nouveau_ws_bo *bo,
|
||||
uint32_t offset, uint32_t range, bool no_prefetch)
|
||||
{
|
||||
#if NVK_NEW_UAPI == 0
|
||||
assert((offset % 4) == 0 && (range % 4) == 0);
|
||||
|
||||
if (range == 0)
|
||||
return;
|
||||
|
||||
assert(range < NOUVEAU_GEM_PUSHBUF_NO_PREFETCH);
|
||||
if (no_prefetch)
|
||||
range |= NOUVEAU_GEM_PUSHBUF_NO_PREFETCH;
|
||||
|
||||
uint32_t bo_index = push_add_bo(pb, bo, NOUVEAU_WS_BO_RD);
|
||||
|
||||
pb->req_push[pb->req.nr_push++] = (struct drm_nouveau_gem_pushbuf_push) {
|
||||
.bo_index = bo_index,
|
||||
.offset = offset,
|
||||
.length = range,
|
||||
};
|
||||
#else
|
||||
push_add_push(pb, bo->offset + offset, range, no_prefetch);
|
||||
#endif
|
||||
}
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
static VkResult
|
||||
bind_submit(struct push_builder *pb, struct nvk_queue *queue, bool sync)
|
||||
{
|
||||
@@ -336,34 +254,11 @@ bind_submit(struct push_builder *pb, struct nvk_queue *queue, bool sync)
|
||||
}
|
||||
return VK_SUCCESS;
|
||||
}
|
||||
#endif
|
||||
|
||||
static VkResult
|
||||
push_submit(struct push_builder *pb, struct nvk_queue *queue, bool sync)
|
||||
{
|
||||
int err;
|
||||
#if NVK_NEW_UAPI == 0
|
||||
err = drmCommandWriteRead(pb->dev->ws_dev->fd,
|
||||
DRM_NOUVEAU_GEM_PUSHBUF,
|
||||
&pb->req, sizeof(pb->req));
|
||||
if (err) {
|
||||
return vk_errorf(queue, VK_ERROR_UNKNOWN,
|
||||
"DRM_NOUVEAU_GEM_PUSHBUF failed: %m");
|
||||
}
|
||||
|
||||
if (sync && pb->req.nr_buffers > 0) {
|
||||
struct drm_nouveau_gem_cpu_prep req = {};
|
||||
req.handle = pb->req_bo[0].handle;
|
||||
req.flags = NOUVEAU_GEM_CPU_PREP_WRITE;
|
||||
err = drmCommandWrite(pb->dev->ws_dev->fd,
|
||||
DRM_NOUVEAU_GEM_CPU_PREP,
|
||||
&req, sizeof(req));
|
||||
if (err) {
|
||||
return vk_errorf(queue, VK_ERROR_UNKNOWN,
|
||||
"DRM_NOUVEAU_GEM_CPU_PREP failed: %m");
|
||||
}
|
||||
}
|
||||
#else
|
||||
if (sync) {
|
||||
assert(pb->req.sig_count < NVK_PUSH_MAX_SYNCS);
|
||||
pb->req_sig[pb->req.sig_count++] = (struct drm_nouveau_sync) {
|
||||
@@ -392,7 +287,6 @@ push_submit(struct push_builder *pb, struct nvk_queue *queue, bool sync)
|
||||
"DRM_SYNCOBJ_WAIT failed: %m");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
return VK_SUCCESS;
|
||||
}
|
||||
|
||||
@@ -459,7 +353,6 @@ nvk_queue_submit_drm_nouveau(struct nvk_queue *queue,
|
||||
push_add_sync_signal(&pb, &submit->signals[i]);
|
||||
}
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
for (uint32_t i = 0; i < submit->buffer_bind_count; i++) {
|
||||
push_add_buffer_bind(&pb, &submit->buffer_binds[i]);
|
||||
}
|
||||
@@ -467,29 +360,15 @@ nvk_queue_submit_drm_nouveau(struct nvk_queue *queue,
|
||||
for (uint32_t i = 0; i < submit->image_opaque_bind_count; i++) {
|
||||
push_add_image_opaque_bind(&pb, &submit->image_opaque_binds[i]);
|
||||
}
|
||||
#else
|
||||
assert(submit->buffer_bind_count == 0);
|
||||
assert(submit->image_opaque_bind_count == 0);
|
||||
#endif
|
||||
|
||||
if (is_vmbind) {
|
||||
assert(submit->command_buffer_count == 0);
|
||||
} else if (submit->command_buffer_count == 0) {
|
||||
#if NVK_NEW_UAPI == 0
|
||||
push_add_push_bo(&pb, queue->empty_push, 0,
|
||||
queue->empty_push_dw_count * 4, false);
|
||||
#endif
|
||||
} else {
|
||||
push_add_queue_state(&pb, &queue->state);
|
||||
|
||||
push_add_heap(&pb, &dev->shader_heap);
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
list_for_each_entry(struct nvk_device_memory, mem,
|
||||
&dev->memory_objects, link) {
|
||||
push_add_bo(&pb, mem->bo, NOUVEAU_WS_BO_RDWR);
|
||||
}
|
||||
#endif
|
||||
|
||||
for (unsigned i = 0; i < submit->command_buffer_count; i++) {
|
||||
struct nvk_cmd_buffer *cmd =
|
||||
@@ -498,15 +377,8 @@ nvk_queue_submit_drm_nouveau(struct nvk_queue *queue,
|
||||
list_for_each_entry_safe(struct nvk_cmd_bo, bo, &cmd->bos, link)
|
||||
push_add_bo(&pb, bo->bo, NOUVEAU_WS_BO_RD);
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
util_dynarray_foreach(&cmd->pushes, struct nvk_cmd_push, push)
|
||||
push_add_push(&pb, push->addr, push->range, push->no_prefetch);
|
||||
#else
|
||||
util_dynarray_foreach(&cmd->pushes, struct nvk_cmd_push, push) {
|
||||
push_add_push_bo(&pb, push->bo, push->bo_offset, push->range,
|
||||
push->no_prefetch);
|
||||
}
|
||||
#endif
|
||||
|
||||
util_dynarray_foreach(&cmd->bo_refs, struct nvk_cmd_bo_ref, ref)
|
||||
push_add_bo(&pb, ref->bo, NOUVEAU_WS_BO_RDWR);
|
||||
@@ -515,30 +387,11 @@ nvk_queue_submit_drm_nouveau(struct nvk_queue *queue,
|
||||
|
||||
VkResult result;
|
||||
if (is_vmbind) {
|
||||
#if NVK_NEW_UAPI == 1
|
||||
result = bind_submit(&pb, queue, sync);
|
||||
#else
|
||||
unreachable("Sparse is not supported on the old uAPI");
|
||||
#endif
|
||||
} else {
|
||||
result = push_submit(&pb, queue, sync);
|
||||
}
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
if (result == VK_SUCCESS) {
|
||||
for (uint32_t i = 0; i < submit->wait_count; i++) {
|
||||
struct nvk_bo_sync *bo_sync =
|
||||
container_of(submit->waits[i].sync, struct nvk_bo_sync, sync);
|
||||
bo_sync->state = NVK_BO_SYNC_STATE_RESET;
|
||||
}
|
||||
for (uint32_t i = 0; i < submit->signal_count; i++) {
|
||||
struct nvk_bo_sync *bo_sync =
|
||||
container_of(submit->signals[i].sync, struct nvk_bo_sync, sync);
|
||||
assert(bo_sync->state == NVK_BO_SYNC_STATE_RESET);
|
||||
bo_sync->state = NVK_BO_SYNC_STATE_SUBMITTED;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
pthread_cond_broadcast(&dev->queue_submit);
|
||||
pthread_mutex_unlock(&dev->mutex);
|
||||
|
@@ -10,7 +10,6 @@
|
||||
#include <sys/mman.h>
|
||||
#include <xf86drm.h>
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
static void
|
||||
bo_bind(struct nouveau_ws_device *dev,
|
||||
uint32_t handle, uint64_t addr,
|
||||
@@ -124,7 +123,6 @@ nouveau_ws_bo_bind_vma(struct nouveau_ws_device *dev,
|
||||
bo->handle, addr, range, bo_offset, pte_kind);
|
||||
bo_bind(dev, bo->handle, addr, range, bo_offset, pte_kind);
|
||||
}
|
||||
#endif
|
||||
|
||||
struct nouveau_ws_bo *
|
||||
nouveau_ws_bo_new(struct nouveau_ws_device *dev,
|
||||
@@ -172,11 +170,7 @@ nouveau_ws_bo_new_tiled(struct nouveau_ws_device *dev,
|
||||
/* Align the size */
|
||||
size = ALIGN(size, align);
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
req.info.domain = NOUVEAU_GEM_TILE_NONCONTIG;
|
||||
#else
|
||||
req.info.domain = 0;
|
||||
#endif
|
||||
|
||||
if (flags & NOUVEAU_WS_BO_GART)
|
||||
req.info.domain |= NOUVEAU_GEM_DOMAIN_GART;
|
||||
@@ -186,17 +180,9 @@ nouveau_ws_bo_new_tiled(struct nouveau_ws_device *dev,
|
||||
if (flags & NOUVEAU_WS_BO_MAP)
|
||||
req.info.domain |= NOUVEAU_GEM_DOMAIN_MAPPABLE;
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
if (flags & NOUVEAU_WS_BO_NO_SHARE)
|
||||
req.info.domain |= NOUVEAU_GEM_DOMAIN_NO_SHARE;
|
||||
#endif
|
||||
|
||||
#if NVK_NEW_UAPI == 0
|
||||
assert(pte_kind == 0 || !(flags & NOUVEAU_WS_BO_GART));
|
||||
assert(tile_mode == 0 || !(flags & NOUVEAU_WS_BO_GART));
|
||||
req.info.tile_flags = (uint32_t)pte_kind << 8;
|
||||
req.info.tile_mode = tile_mode;
|
||||
#endif
|
||||
|
||||
req.info.size = size;
|
||||
req.align = align;
|
||||
@@ -207,24 +193,18 @@ nouveau_ws_bo_new_tiled(struct nouveau_ws_device *dev,
|
||||
if (ret == 0) {
|
||||
bo->size = size;
|
||||
bo->align = align;
|
||||
#if NVK_NEW_UAPI == 0
|
||||
bo->offset = req.info.offset;
|
||||
#else
|
||||
bo->offset = -1ULL;
|
||||
#endif
|
||||
bo->handle = req.info.handle;
|
||||
bo->map_handle = req.info.map_handle;
|
||||
bo->dev = dev;
|
||||
bo->flags = flags;
|
||||
bo->refcnt = 1;
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
if (dev->has_vm_bind) {
|
||||
assert(pte_kind == 0);
|
||||
bo->offset = nouveau_ws_alloc_vma(dev, bo->size, align, false);
|
||||
nouveau_ws_bo_bind_vma(dev, bo, bo->offset, bo->size, 0, 0);
|
||||
}
|
||||
#endif
|
||||
|
||||
_mesa_hash_table_insert(dev->bos, (void *)(uintptr_t)bo->handle, bo);
|
||||
} else {
|
||||
@@ -273,7 +253,6 @@ nouveau_ws_bo_from_dma_buf(struct nouveau_ws_device *dev, int fd)
|
||||
bo->flags = flags;
|
||||
bo->refcnt = 1;
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
uint64_t align = (1ULL << 12);
|
||||
if (info.domain & NOUVEAU_GEM_DOMAIN_VRAM)
|
||||
align = (1ULL << 16);
|
||||
@@ -282,7 +261,6 @@ nouveau_ws_bo_from_dma_buf(struct nouveau_ws_device *dev, int fd)
|
||||
|
||||
bo->offset = nouveau_ws_alloc_vma(dev, bo->size, align, false);
|
||||
nouveau_ws_bo_bind_vma(dev, bo, bo->offset, bo->size, 0, 0);
|
||||
#endif
|
||||
_mesa_hash_table_insert(dev->bos, (void *)(uintptr_t)handle, bo);
|
||||
}
|
||||
}
|
||||
@@ -305,12 +283,10 @@ nouveau_ws_bo_destroy(struct nouveau_ws_bo *bo)
|
||||
|
||||
_mesa_hash_table_remove_key(dev->bos, (void *)(uintptr_t)bo->handle);
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
if (dev->has_vm_bind) {
|
||||
nouveau_ws_bo_unbind_vma(bo->dev, bo->offset, bo->size);
|
||||
nouveau_ws_free_vma(bo->dev, bo->offset, bo->size, false);
|
||||
}
|
||||
#endif
|
||||
|
||||
drmCloseBufferHandle(bo->dev->fd, bo->handle);
|
||||
FREE(bo);
|
||||
|
@@ -43,7 +43,6 @@ struct nouveau_ws_bo {
|
||||
atomic_uint_fast32_t refcnt;
|
||||
};
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
uint64_t nouveau_ws_alloc_vma(struct nouveau_ws_device *dev,
|
||||
uint64_t size, uint64_t align, bool sparse);
|
||||
|
||||
@@ -58,7 +57,6 @@ void nouveau_ws_bo_bind_vma(struct nouveau_ws_device *dev,
|
||||
uint32_t pte_kind);
|
||||
void nouveau_ws_bo_unbind_vma(struct nouveau_ws_device *dev,
|
||||
uint64_t offset, uint64_t range);
|
||||
#endif
|
||||
|
||||
struct nouveau_ws_bo *nouveau_ws_bo_new(struct nouveau_ws_device *,
|
||||
uint64_t size, uint64_t align,
|
||||
|
@@ -269,7 +269,6 @@ nouveau_ws_device_new(drmDevicePtr drm_device)
|
||||
if (version < 0x01000301)
|
||||
goto out_err;
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
const uint64_t TOP = 1ull << 40;
|
||||
const uint64_t KERN = 1ull << 39;
|
||||
struct drm_nouveau_vm_init vminit = { TOP-KERN, KERN };
|
||||
@@ -279,7 +278,6 @@ nouveau_ws_device_new(drmDevicePtr drm_device)
|
||||
util_vma_heap_init(&device->vma_heap, 4096, (TOP - KERN) - 4096);
|
||||
simple_mtx_init(&device->vma_mutex, mtx_plain);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (nouveau_ws_device_alloc(fd, device))
|
||||
goto out_err;
|
||||
@@ -342,12 +340,10 @@ nouveau_ws_device_new(drmDevicePtr drm_device)
|
||||
return device;
|
||||
|
||||
out_err:
|
||||
#if NVK_NEW_UAPI == 1
|
||||
if (device->has_vm_bind) {
|
||||
util_vma_heap_finish(&device->vma_heap);
|
||||
simple_mtx_destroy(&device->vma_mutex);
|
||||
}
|
||||
#endif
|
||||
if (ver)
|
||||
drmFreeVersion(ver);
|
||||
out_open:
|
||||
@@ -365,12 +361,10 @@ nouveau_ws_device_destroy(struct nouveau_ws_device *device)
|
||||
_mesa_hash_table_destroy(device->bos, NULL);
|
||||
simple_mtx_destroy(&device->bos_lock);
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
if (device->has_vm_bind) {
|
||||
util_vma_heap_finish(&device->vma_heap);
|
||||
simple_mtx_destroy(&device->vma_mutex);
|
||||
}
|
||||
#endif
|
||||
|
||||
close(device->fd);
|
||||
FREE(device);
|
||||
|
@@ -15,9 +15,6 @@ struct hash_table;
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifndef NVK_NEW_UAPI
|
||||
#define NVK_NEW_UAPI 1
|
||||
#endif
|
||||
|
||||
enum nvk_debug {
|
||||
/* dumps all push buffers after submission */
|
||||
@@ -51,11 +48,9 @@ struct nouveau_ws_device {
|
||||
simple_mtx_t bos_lock;
|
||||
struct hash_table *bos;
|
||||
|
||||
#if NVK_NEW_UAPI == 1
|
||||
bool has_vm_bind;
|
||||
struct util_vma_heap vma_heap;
|
||||
simple_mtx_t vma_mutex;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct nouveau_ws_device *nouveau_ws_device_new(struct _drmDevice *drm_device);
|
||||
|
Reference in New Issue
Block a user