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freedreno/a6xx: Fix z24s8 non-ubwc blits on a630.

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Taken from the logic in turnip (though they have the format table have
8888_unorm and override to z24s8_as_rgba for blits in the ubwc case)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8319>
This commit is contained in:
Eric Anholt
2021-01-04 11:34:00 -08:00
committed by Marge Bot
parent d6e307dcc5
commit 6a8601fb24
1 changed files with 14 additions and 2 deletions
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16
src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
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@@ -883,6 +883,9 @@ handle_zs_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
dump_blit_info(info);
}
struct fd_resource *src = fd_resource(info->src.resource);
struct fd_resource *dst = fd_resource(info->dst.resource);
switch (info->dst.format) {
case PIPE_FORMAT_S8_UINT:
debug_assert(info->mask == PIPE_MASK_S);
@@ -903,8 +906,8 @@ handle_zs_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
blit.mask = PIPE_MASK_R;
blit.src.format = PIPE_FORMAT_R8_UINT;
blit.dst.format = PIPE_FORMAT_R8_UINT;
blit.src.resource = &fd_resource(info->src.resource)->stencil->base;
blit.dst.resource = &fd_resource(info->dst.resource)->stencil->base;
blit.src.resource = &src->stencil->base;
blit.dst.resource = &dst->stencil->base;
do_rewritten_blit(ctx, &blit);
}
@@ -933,6 +936,15 @@ handle_zs_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
blit.mask |= PIPE_MASK_A;
blit.src.format = PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
blit.dst.format = PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
/* non-UBWC Z24_UNORM_S8_UINT_AS_R8G8B8A8 is broken on a630, fall back to
* 8888_unorm.
*/
if (!ctx->screen->info.a6xx.has_z24uint_s8uint) {
if (!src->layout.ubwc)
blit.src.format = PIPE_FORMAT_RGBA8888_UNORM;
if (!dst->layout.ubwc)
blit.dst.format = PIPE_FORMAT_RGBA8888_UNORM;
}
return fd_blitter_blit(ctx, &blit);
default: