OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

intel/brw: Rename brw_reg() helper to brw_make_reg()

Browse Source 
To avoid conflict with the name of the type later on.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791>
This commit is contained in:
Caio Oliveira
2024-06-18 23:25:14 -07:00
committed by Marge Bot
parent 6b2405e1f5
commit 69f4ed3102
3 changed files with 64 additions and 64 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/intel/compiler/brw_fs.cpp
View File

@@ -2007,7 +2007,7 @@ fs_visitor::emit_repclear_shader()
/* We pass the clear color as a flat input. Copy it to the output. */
fs_reg color_input =
brw_reg(BRW_GENERAL_REGISTER_FILE, 2, 3, 0, 0, BRW_TYPE_UD,
brw_make_reg(BRW_GENERAL_REGISTER_FILE, 2, 3, 0, 0, BRW_TYPE_UD,
BRW_VERTICAL_STRIDE_8, BRW_WIDTH_2, BRW_HORIZONTAL_STRIDE_4,
BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);

8
src/intel/compiler/brw_gram.y
View File

@@ -93,7 +93,7 @@ isPowerofTwo(unsigned int x)
static struct brw_reg
set_direct_src_operand(struct brw_reg *reg, int type)
{
return brw_reg(reg->file,
return brw_make_reg(reg->file,
reg->nr,
reg->subnr,
0, // negate
@@ -1471,7 +1471,7 @@ directsrcaccoperand:
srcarcoperandex:
srcarcoperandex_typed region reg_type
{
$$ = brw_reg($1.file,
$$ = brw_make_reg($1.file,
$1.nr,
$1.subnr,
0,
@@ -1508,7 +1508,7 @@ srcarcoperandex_typed:
indirectsrcoperand:
negate abs indirectgenreg indirectregion swizzle reg_type
{
$$ = brw_reg($3.file,
$$ = brw_make_reg($3.file,
0,
$3.subnr,
$1, // negate
@@ -1536,7 +1536,7 @@ directgenreg_list:
directsrcoperand:
negate abs directgenreg_list region swizzle reg_type
{
$$ = brw_reg($3.file,
$$ = brw_make_reg($3.file,
$3.nr,
$3.subnr,
$1,

18
src/intel/compiler/brw_reg.h
View File

@@ -356,7 +356,7 @@ brw_int_type(unsigned sz, bool is_signed)
* \param writemask WRITEMASK_X/Y/Z/W bitfield
*/
static inline struct brw_reg
brw_reg(enum brw_reg_file file,
brw_make_reg(enum brw_reg_file file,
unsigned nr,
unsigned subnr,
unsigned negate,
@@ -413,7 +413,7 @@ brw_reg(enum brw_reg_file file,
static inline struct brw_reg
brw_vec16_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
{
return brw_reg(file,
return brw_make_reg(file,
nr,
subnr,
0,
@@ -430,7 +430,7 @@ brw_vec16_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
static inline struct brw_reg
brw_vec8_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
{
return brw_reg(file,
return brw_make_reg(file,
nr,
subnr,
0,
@@ -447,7 +447,7 @@ brw_vec8_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
static inline struct brw_reg
brw_vec4_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
{
return brw_reg(file,
return brw_make_reg(file,
nr,
subnr,
0,
@@ -464,7 +464,7 @@ brw_vec4_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
static inline struct brw_reg
brw_vec2_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
{
return brw_reg(file,
return brw_make_reg(file,
nr,
subnr,
0,
@@ -481,7 +481,7 @@ brw_vec2_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
static inline struct brw_reg
brw_vec1_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
{
return brw_reg(file,
return brw_make_reg(file,
nr,
subnr,
0,
@@ -610,7 +610,7 @@ brw_ud1_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
static inline struct brw_reg
brw_imm_reg(enum brw_reg_type type)
{
return brw_reg(BRW_IMMEDIATE_VALUE,
return brw_make_reg(BRW_IMMEDIATE_VALUE,
0,
0,
0,
@@ -891,7 +891,7 @@ brw_tdr_reg(void)
static inline struct brw_reg
brw_ip_reg(void)
{
return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE,
return brw_make_reg(BRW_ARCHITECTURE_REGISTER_FILE,
BRW_ARF_IP,
0,
0,
@@ -907,7 +907,7 @@ brw_ip_reg(void)
static inline struct brw_reg
brw_notification_reg(void)
{
return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE,
return brw_make_reg(BRW_ARCHITECTURE_REGISTER_FILE,
BRW_ARF_NOTIFICATION_COUNT,
0,
0,