st/glsl: merge link_shader() into st_link_nir()
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
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@@ -38,65 +38,6 @@
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#include "main/shaderapi.h"
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#include "main/shaderobj.h"
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static GLboolean
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link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
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{
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GLboolean ret;
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struct st_context *sctx = st_context(ctx);
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struct pipe_screen *pscreen = sctx->screen;
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/* Return early if we are loading the shader from on-disk cache */
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if (st_load_nir_from_disk_cache(ctx, prog)) {
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return GL_TRUE;
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}
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MESA_TRACE_FUNC();
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assert(prog->data->LinkStatus);
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/* Skip the GLSL steps when using SPIR-V. */
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if (prog->data->spirv) {
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return st_link_nir(ctx, prog);
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}
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for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
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if (prog->_LinkedShaders[i] == NULL)
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continue;
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struct gl_linked_shader *shader = prog->_LinkedShaders[i];
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exec_list *ir = shader->ir;
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gl_shader_stage stage = shader->Stage;
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const struct gl_shader_compiler_options *options =
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&ctx->Const.ShaderCompilerOptions[stage];
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enum pipe_shader_type ptarget = pipe_shader_type_from_mesa(stage);
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bool have_dround = pscreen->get_shader_param(pscreen, ptarget,
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PIPE_SHADER_CAP_DROUND_SUPPORTED);
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if (!pscreen->get_param(pscreen, PIPE_CAP_INT64_DIVMOD))
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lower_64bit_integer_instructions(ir, DIV64 | MOD64);
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lower_packing_builtins(ir, ctx->Extensions.ARB_shading_language_packing,
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ctx->Extensions.ARB_gpu_shader5,
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ctx->st->has_half_float_packing);
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do_mat_op_to_vec(ir);
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lower_instructions(ir, have_dround,
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ctx->Extensions.ARB_gpu_shader5);
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do_vec_index_to_cond_assign(ir);
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if (options->MaxIfDepth == 0) {
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lower_discard(ir);
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}
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validate_ir_tree(ir);
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}
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ret = st_link_nir(ctx, prog);
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return ret;
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}
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extern "C" {
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/**
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@@ -109,7 +50,7 @@ st_link_glsl_to_nir(struct gl_context *ctx, struct gl_shader_program *prog)
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MESA_TRACE_FUNC();
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GLboolean ret = link_shader(ctx, prog);
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GLboolean ret = st_link_nir(ctx, prog);
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if (pctx->link_shader) {
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void *driver_handles[PIPE_SHADER_TYPES];
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@@ -486,11 +486,55 @@ st_link_nir(struct gl_context *ctx,
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struct gl_shader_program *shader_program)
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{
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struct st_context *st = st_context(ctx);
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struct pipe_screen *pscreen = st->screen;
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struct gl_linked_shader *linked_shader[MESA_SHADER_STAGES];
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unsigned num_shaders = 0;
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/* Return early if we are loading the shader from on-disk cache */
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if (st_load_nir_from_disk_cache(ctx, shader_program)) {
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return GL_TRUE;
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}
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MESA_TRACE_FUNC();
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assert(shader_program->data->LinkStatus);
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/* Skip the GLSL steps when using SPIR-V. */
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if (!shader_program->data->spirv) {
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for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
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if (shader_program->_LinkedShaders[i] == NULL)
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continue;
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struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
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exec_list *ir = shader->ir;
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gl_shader_stage stage = shader->Stage;
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const struct gl_shader_compiler_options *options =
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&ctx->Const.ShaderCompilerOptions[stage];
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enum pipe_shader_type ptarget = pipe_shader_type_from_mesa(stage);
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bool have_dround = pscreen->get_shader_param(pscreen, ptarget,
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PIPE_SHADER_CAP_DROUND_SUPPORTED);
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if (!pscreen->get_param(pscreen, PIPE_CAP_INT64_DIVMOD))
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lower_64bit_integer_instructions(ir, DIV64 | MOD64);
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lower_packing_builtins(ir, ctx->Extensions.ARB_shading_language_packing,
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ctx->Extensions.ARB_gpu_shader5,
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ctx->st->has_half_float_packing);
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do_mat_op_to_vec(ir);
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lower_instructions(ir, have_dround,
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ctx->Extensions.ARB_gpu_shader5);
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do_vec_index_to_cond_assign(ir);
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if (options->MaxIfDepth == 0) {
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lower_discard(ir);
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}
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validate_ir_tree(ir);
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}
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}
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for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
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if (shader_program->_LinkedShaders[i])
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linked_shader[num_shaders++] = shader_program->_LinkedShaders[i];
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