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gallium: Add support for 32x32 muls with 64 bit results

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The code introduces two new 32bit integer multiplication opcodes which
can be used to produce correct 64 bit results. GLSL, OpenCL and D3D10+
require them. We use two seperate opcodes, because they match the
behavior of GLSL and OpenCL, are a lot easier to add than a single
opcode with multiple destinations and because there's not much (any)
difference wrt code-generation.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
This commit is contained in:
Zack Rusin
2013-10-08 15:11:02 -04:00
parent c01c6a95b4
commit 6905698fc2
8 changed files with 103 additions and 1 deletions
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30
src/gallium/docs/source/tgsi.rst
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@@ -1103,6 +1103,36 @@ Support for these opcodes indicated by PIPE_SHADER_CAP_INTEGERS (all of them?)
dst.w = src0.w \times src1.w
.. opcode:: IMUL_HI - Signed Integer Multiply High Bits
The high 32bits of the multiplication of 2 signed integers are returned.
.. math::
dst.x = (src0.x \times src1.x) >> 32
dst.y = (src0.y \times src1.y) >> 32
dst.z = (src0.z \times src1.z) >> 32
dst.w = (src0.w \times src1.w) >> 32
.. opcode:: UMUL_HI - Unsigned Integer Multiply High Bits
The high 32bits of the multiplication of 2 unsigned integers are returned.
.. math::
dst.x = (src0.x \times src1.x) >> 32
dst.y = (src0.y \times src1.y) >> 32
dst.z = (src0.z \times src1.z) >> 32
dst.w = (src0.w \times src1.w) >> 32
.. opcode:: IDIV - Signed Integer Division
TBD: behavior for division by zero.