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i965: Use is_scheduling_barrier instead of schedule_node::is_barrier.

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Commit a73116ecc6 tried to make add_barrier_deps()
walk to the next barrier, and stop.  To accomplish that, it added an
is_barrier flag.  Unfortunately, this only works half of the time.

The issue is that add_barrier_deps() walks both backward (to the
previous barrier), and forward (to the next barrier).  It also sets
is_barrier.  Assuming that we're processing instructions in forward
order, this means that is_barrier will be set for previous instructions,
but not future ones.  So we'll never see it, and walk further than we
need to.

dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.23
now compiles its shaders in 3.6 seconds instead of 3.3 minutes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Pallavi G <pallavi.g@intel.com>
This commit is contained in:
Kenneth Graunke
2017-10-17 23:19:20 -07:00
parent 3d112a7cd4
commit 68f69ebdcc
1 changed files with 10 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
src/intel/compiler/brw_schedule_instructions.cpp
View File

@@ -94,8 +94,6 @@ public:
* successors is an exit node. * successors is an exit node.
*/ */
schedule_node *exit; schedule_node *exit;
bool is_barrier;
}; };
/** /**
@@ -800,7 +798,6 @@ schedule_node::schedule_node(backend_instruction *inst,
this->cand_generation = 0; this->cand_generation = 0;
this->delay = 0; this->delay = 0;
this->exit = NULL; this->exit = NULL;
this->is_barrier = false;
/* We can't measure Gen6 timings directly but expect them to be much /* We can't measure Gen6 timings directly but expect them to be much
* closer to Gen7 than Gen4. * closer to Gen7 than Gen4.
@@ -921,6 +918,14 @@ instruction_scheduler::add_dep(schedule_node *before, schedule_node *after)
add_dep(before, after, before->latency); add_dep(before, after, before->latency);
} }
static bool
is_scheduling_barrier(const backend_instruction *inst)
{
return inst->opcode == FS_OPCODE_PLACEHOLDER_HALT ||
inst->is_control_flow() ||
inst->has_side_effects();
}
/** /**
* Sometimes we really want this node to execute after everything that * Sometimes we really want this node to execute after everything that
* was before it and before everything that followed it. This adds * was before it and before everything that followed it. This adds
@@ -932,12 +937,10 @@ instruction_scheduler::add_barrier_deps(schedule_node *n)
schedule_node *prev = (schedule_node *)n->prev; schedule_node *prev = (schedule_node *)n->prev;
schedule_node *next = (schedule_node *)n->next; schedule_node *next = (schedule_node *)n->next;
n->is_barrier = true;
if (prev) { if (prev) {
while (!prev->is_head_sentinel()) { while (!prev->is_head_sentinel()) {
add_dep(prev, n, 0); add_dep(prev, n, 0);
if (prev->is_barrier) if (is_scheduling_barrier(prev->inst))
break; break;
prev = (schedule_node *)prev->prev; prev = (schedule_node *)prev->prev;
} }
@@ -946,7 +949,7 @@ instruction_scheduler::add_barrier_deps(schedule_node *n)
if (next) { if (next) {
while (!next->is_tail_sentinel()) { while (!next->is_tail_sentinel()) {
add_dep(n, next, 0); add_dep(n, next, 0);
if (next->is_barrier) if (is_scheduling_barrier(next->inst))
break; break;
next = (schedule_node *)next->next; next = (schedule_node *)next->next;
} }
@@ -962,14 +965,6 @@ fs_instruction_scheduler::is_compressed(fs_inst *inst)
return inst->exec_size == 16; return inst->exec_size == 16;
} }
static bool
is_scheduling_barrier(const fs_inst *inst)
{
return inst->opcode == FS_OPCODE_PLACEHOLDER_HALT ||
inst->is_control_flow() ||
inst->has_side_effects();
}
void void
fs_instruction_scheduler::calculate_deps() fs_instruction_scheduler::calculate_deps()
{ {
@@ -1233,13 +1228,6 @@ fs_instruction_scheduler::calculate_deps()
} }
} }
static bool
is_scheduling_barrier(const vec4_instruction *inst)
{
return inst->is_control_flow() ||
inst->has_side_effects();
}
void void
vec4_instruction_scheduler::calculate_deps() vec4_instruction_scheduler::calculate_deps()
{ {