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intel/isl: Support Yf/Ys tiling in emit_depth_stencil_hiz

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Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
This commit is contained in:
Jason Ekstrand
2017-08-25 11:23:23 -07:00
committed by Marge Bot
parent 01b50c9dac
commit 68ac5c2165
1 changed files with 26 additions and 7 deletions
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33
src/intel/isl/isl_emit_depth_stencil.c
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@@ -58,12 +58,20 @@ static const uint32_t isl_encode_ds_surftype[] = {
[ISL_SURF_DIM_3D] = SURFTYPE_3D,
};
#if GFX_VERx10 >= 125
#if GFX_VER >= 9
static const uint8_t isl_encode_tiling[] = {
[ISL_TILING_4] = TILE4,
[ISL_TILING_64] = TILE64,
};
#if GFX_VERx10 >= 125
[ISL_TILING_4] = TILE4,
[ISL_TILING_64] = TILE64,
#else
[ISL_TILING_Y0] = NONE,
[ISL_TILING_SKL_Yf] = TILEYF,
[ISL_TILING_SKL_Ys] = TILEYS,
[ISL_TILING_ICL_Yf] = TILEYF,
[ISL_TILING_ICL_Ys] = TILEYS,
#endif
};
#endif /* GFX_VER >= 9 */
void
isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
@@ -166,7 +174,18 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
db.CompressionMode = isl_aux_usage_has_ccs(info->hiz_usage);
db.RenderCompressionFormat =
isl_get_render_compression_format(info->depth_surf->format);
#elif GFX_VER <= 6
#elif GFX_VER >= 9
/* Gen9+ depth is always Y-tiled but it may be Y0, Yf, or Ys. */
assert(isl_tiling_is_any_y(info->depth_surf->tiling));
db.TiledResourceMode = isl_encode_tiling[info->depth_surf->tiling];
/* We don't use miptails yet. The PRM recommends that you set "Mip Tail
* Start LOD" to 15 to prevent the hardware from trying to use them.
*/
db.MipTailStartLOD = 15;
#elif GFX_VER >= 7
/* Gen7+ depth is always Y-tiled. We don't even have a bit for it */
#else
assert(info->depth_surf->tiling == ISL_TILING_Y0);
db.TiledSurface = true;
db.TileWalk = TILEWALK_YMAJOR;
@@ -219,13 +238,13 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
db.StencilWriteEnable = true;
#endif
#if GFX_VERx10 >= 125
sb.TiledMode = isl_encode_tiling[info->stencil_surf->tiling];
sb.MipTailStartLOD = 15;
sb.CompressionMode = isl_aux_usage_has_ccs(info->stencil_aux_usage);
sb.RenderCompressionFormat =
isl_get_render_compression_format(info->stencil_surf->format);
#endif
#if GFX_VER >= 12
sb.TiledMode = isl_encode_tiling[info->stencil_surf->tiling];
sb.MipTailStartLOD = 15;
sb.StencilWriteEnable = true;
sb.SurfaceType = SURFTYPE_2D;
sb.Width = info->stencil_surf->logical_level0_px.width - 1;