radv: convert the meta blit path to dynamic rendering
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15612>
This commit is contained in:
@@ -32,7 +32,7 @@ struct blit_region {
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};
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};
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static VkResult build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
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static VkResult build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
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enum glsl_sampler_dim tex_dim, unsigned fs_key,
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enum glsl_sampler_dim tex_dim, VkFormat format,
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VkPipeline *pipeline);
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VkPipeline *pipeline);
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static nir_shader *
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static nir_shader *
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@@ -261,41 +261,25 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
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device->meta_state.blit.pipeline_layout, VK_SHADER_STAGE_VERTEX_BIT, 0, 20,
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device->meta_state.blit.pipeline_layout, VK_SHADER_STAGE_VERTEX_BIT, 0, 20,
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vertex_push_constants);
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vertex_push_constants);
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VkFramebuffer fb;
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radv_CreateFramebuffer(radv_device_to_handle(device),
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&(VkFramebufferCreateInfo){
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.sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
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.attachmentCount = 1,
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.pAttachments =
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(VkImageView[]){
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radv_image_view_to_handle(dest_iview),
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},
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.width = dst_width,
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.height = dst_height,
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.layers = 1,
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},
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&cmd_buffer->pool->vk.alloc, &fb);
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VkPipeline *pipeline = NULL;
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VkPipeline *pipeline = NULL;
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unsigned fs_key = 0;
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unsigned fs_key = 0;
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VkFormat format = VK_FORMAT_UNDEFINED;
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VkRenderingAttachmentInfo color_att = {0}, depth_att = {0}, stencil_att = {0};
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switch (src_iview->aspect_mask) {
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switch (src_iview->aspect_mask) {
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case VK_IMAGE_ASPECT_COLOR_BIT: {
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case VK_IMAGE_ASPECT_COLOR_BIT: {
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unsigned dst_layout = radv_meta_dst_layout_from_layout(dest_image_layout);
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unsigned dst_layout = radv_meta_dst_layout_from_layout(dest_image_layout);
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VkImageLayout layout = radv_meta_dst_layout_to_layout(dst_layout);
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fs_key = radv_format_meta_fs_key(device, dest_image->vk_format);
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fs_key = radv_format_meta_fs_key(device, dest_image->vk_format);
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format = radv_fs_key_format_exemplars[fs_key];
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color_att.sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO;
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color_att.imageView = radv_image_view_to_handle(dest_iview);
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color_att.imageLayout = layout;
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color_att.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
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color_att.storeOp = VK_ATTACHMENT_STORE_OP_STORE;
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radv_cmd_buffer_begin_render_pass(
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cmd_buffer,
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&(VkRenderPassBeginInfo){
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
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.renderPass = device->meta_state.blit.render_pass[fs_key][dst_layout],
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.framebuffer = fb,
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.renderArea =
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{
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.offset = {dest_box.offset.x, dest_box.offset.y},
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.extent = {dest_box.extent.width, dest_box.extent.height},
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},
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.clearValueCount = 0,
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.pClearValues = NULL,
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});
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switch (src_image->type) {
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switch (src_image->type) {
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case VK_IMAGE_TYPE_1D:
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case VK_IMAGE_TYPE_1D:
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pipeline = &device->meta_state.blit.pipeline_1d_src[fs_key];
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pipeline = &device->meta_state.blit.pipeline_1d_src[fs_key];
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@@ -313,20 +297,15 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
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}
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}
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case VK_IMAGE_ASPECT_DEPTH_BIT: {
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case VK_IMAGE_ASPECT_DEPTH_BIT: {
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enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dest_image_layout);
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enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dest_image_layout);
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radv_cmd_buffer_begin_render_pass(
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VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout);
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cmd_buffer,
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format = VK_FORMAT_D32_SFLOAT;
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&(VkRenderPassBeginInfo){
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
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depth_att.sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO;
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.renderPass = device->meta_state.blit.depth_only_rp[ds_layout],
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depth_att.imageView = radv_image_view_to_handle(dest_iview);
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.framebuffer = fb,
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depth_att.imageLayout = layout;
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.renderArea =
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depth_att.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
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{
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depth_att.storeOp = VK_ATTACHMENT_STORE_OP_STORE;
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.offset = {dest_box.offset.x, dest_box.offset.y},
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.extent = {dest_box.extent.width, dest_box.extent.height},
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},
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.clearValueCount = 0,
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.pClearValues = NULL,
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});
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switch (src_image->type) {
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switch (src_image->type) {
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case VK_IMAGE_TYPE_1D:
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case VK_IMAGE_TYPE_1D:
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pipeline = &device->meta_state.blit.depth_only_1d_pipeline;
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pipeline = &device->meta_state.blit.depth_only_1d_pipeline;
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@@ -344,20 +323,15 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
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}
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}
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case VK_IMAGE_ASPECT_STENCIL_BIT: {
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case VK_IMAGE_ASPECT_STENCIL_BIT: {
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enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dest_image_layout);
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enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dest_image_layout);
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radv_cmd_buffer_begin_render_pass(
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VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout);
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cmd_buffer,
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format = VK_FORMAT_S8_UINT;
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&(VkRenderPassBeginInfo){
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
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stencil_att.sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO;
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.renderPass = device->meta_state.blit.stencil_only_rp[ds_layout],
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stencil_att.imageView = radv_image_view_to_handle(dest_iview);
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.framebuffer = fb,
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stencil_att.imageLayout = layout;
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.renderArea =
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stencil_att.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
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{
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stencil_att.storeOp = VK_ATTACHMENT_STORE_OP_STORE;
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.offset = {dest_box.offset.x, dest_box.offset.y},
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.extent = {dest_box.extent.width, dest_box.extent.height},
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},
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.clearValueCount = 0,
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.pClearValues = NULL,
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});
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switch (src_image->type) {
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switch (src_image->type) {
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case VK_IMAGE_TYPE_1D:
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case VK_IMAGE_TYPE_1D:
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pipeline = &device->meta_state.blit.stencil_only_1d_pipeline;
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pipeline = &device->meta_state.blit.stencil_only_1d_pipeline;
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@@ -377,14 +351,12 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
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unreachable("bad VkImageType");
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unreachable("bad VkImageType");
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}
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}
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radv_cmd_buffer_set_subpass(cmd_buffer, &cmd_buffer->state.pass->subpasses[0]);
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if (!*pipeline) {
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if (!*pipeline) {
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VkResult ret = build_pipeline(device, src_iview->aspect_mask,
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VkResult ret = build_pipeline(device, src_iview->aspect_mask,
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translate_sampler_dim(src_image->type), fs_key, pipeline);
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translate_sampler_dim(src_image->type), format, pipeline);
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if (ret != VK_SUCCESS) {
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if (ret != VK_SUCCESS) {
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cmd_buffer->record_result = ret;
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cmd_buffer->record_result = ret;
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goto fail_pipeline;
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return;
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}
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}
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}
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}
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@@ -424,18 +396,33 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
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abs(dest_offset_1.y - dest_offset_0.y)},
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abs(dest_offset_1.y - dest_offset_0.y)},
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});
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});
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VkRenderingInfo rendering_info = {
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.sType = VK_STRUCTURE_TYPE_RENDERING_INFO,
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.renderArea = {
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.offset = { 0, 0 },
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.extent = { dst_width, dst_height },
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},
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.layerCount = 1,
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};
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switch (src_iview->aspect_mask) {
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case VK_IMAGE_ASPECT_COLOR_BIT:
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rendering_info.colorAttachmentCount = 1;
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rendering_info.pColorAttachments = &color_att;
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break;
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case VK_IMAGE_ASPECT_DEPTH_BIT:
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rendering_info.pDepthAttachment = &depth_att;
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break;
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case VK_IMAGE_ASPECT_STENCIL_BIT:
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rendering_info.pStencilAttachment = &stencil_att;
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break;
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}
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radv_CmdBeginRendering(radv_cmd_buffer_to_handle(cmd_buffer), &rendering_info);
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radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
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radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
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fail_pipeline:
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radv_CmdEndRendering(radv_cmd_buffer_to_handle(cmd_buffer));
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radv_cmd_buffer_end_render_pass(cmd_buffer);
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/* At the point where we emit the draw call, all data from the
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* descriptor sets, etc. has been used. We are free to delete it.
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*/
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/* TODO: above comment is not valid for at least descriptor sets/pools,
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* as we may not free them till after execution finishes. Check others. */
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radv_DestroyFramebuffer(radv_device_to_handle(device), fb, &cmd_buffer->pool->vk.alloc);
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}
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}
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static bool
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static bool
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@@ -640,10 +627,6 @@ radv_device_finish_meta_blit_state(struct radv_device *device)
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struct radv_meta_state *state = &device->meta_state;
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struct radv_meta_state *state = &device->meta_state;
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for (unsigned i = 0; i < NUM_META_FS_KEYS; ++i) {
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for (unsigned i = 0; i < NUM_META_FS_KEYS; ++i) {
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for (unsigned j = 0; j < RADV_META_DST_LAYOUT_COUNT; ++j) {
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radv_DestroyRenderPass(radv_device_to_handle(device), state->blit.render_pass[i][j],
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&state->alloc);
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}
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radv_DestroyPipeline(radv_device_to_handle(device), state->blit.pipeline_1d_src[i],
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radv_DestroyPipeline(radv_device_to_handle(device), state->blit.pipeline_1d_src[i],
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&state->alloc);
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&state->alloc);
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radv_DestroyPipeline(radv_device_to_handle(device), state->blit.pipeline_2d_src[i],
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radv_DestroyPipeline(radv_device_to_handle(device), state->blit.pipeline_2d_src[i],
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@@ -652,14 +635,6 @@ radv_device_finish_meta_blit_state(struct radv_device *device)
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&state->alloc);
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&state->alloc);
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}
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}
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for (enum radv_blit_ds_layout i = RADV_BLIT_DS_LAYOUT_TILE_ENABLE; i < RADV_BLIT_DS_LAYOUT_COUNT;
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i++) {
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radv_DestroyRenderPass(radv_device_to_handle(device), state->blit.depth_only_rp[i],
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&state->alloc);
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radv_DestroyRenderPass(radv_device_to_handle(device), state->blit.stencil_only_rp[i],
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&state->alloc);
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}
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radv_DestroyPipeline(radv_device_to_handle(device), state->blit.depth_only_1d_pipeline,
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radv_DestroyPipeline(radv_device_to_handle(device), state->blit.depth_only_1d_pipeline,
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&state->alloc);
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&state->alloc);
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radv_DestroyPipeline(radv_device_to_handle(device), state->blit.depth_only_2d_pipeline,
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radv_DestroyPipeline(radv_device_to_handle(device), state->blit.depth_only_2d_pipeline,
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@@ -682,7 +657,7 @@ radv_device_finish_meta_blit_state(struct radv_device *device)
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static VkResult
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static VkResult
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build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
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build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
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enum glsl_sampler_dim tex_dim, unsigned fs_key, VkPipeline *pipeline)
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enum glsl_sampler_dim tex_dim, VkFormat format, VkPipeline *pipeline)
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{
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{
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VkResult result = VK_SUCCESS;
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VkResult result = VK_SUCCESS;
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@@ -695,20 +670,24 @@ build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
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nir_shader *fs;
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nir_shader *fs;
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nir_shader *vs = build_nir_vertex_shader();
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nir_shader *vs = build_nir_vertex_shader();
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VkRenderPass rp;
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VkPipelineRenderingCreateInfo rendering_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_RENDERING_CREATE_INFO,
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};
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switch (aspect) {
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switch (aspect) {
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case VK_IMAGE_ASPECT_COLOR_BIT:
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case VK_IMAGE_ASPECT_COLOR_BIT:
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fs = build_nir_copy_fragment_shader(tex_dim);
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fs = build_nir_copy_fragment_shader(tex_dim);
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rp = device->meta_state.blit.render_pass[fs_key][0];
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rendering_create_info.colorAttachmentCount = 1;
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rendering_create_info.pColorAttachmentFormats = &format;
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break;
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break;
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case VK_IMAGE_ASPECT_DEPTH_BIT:
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case VK_IMAGE_ASPECT_DEPTH_BIT:
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fs = build_nir_copy_fragment_shader_depth(tex_dim);
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fs = build_nir_copy_fragment_shader_depth(tex_dim);
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rp = device->meta_state.blit.depth_only_rp[0];
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rendering_create_info.depthAttachmentFormat = format;
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break;
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break;
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case VK_IMAGE_ASPECT_STENCIL_BIT:
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case VK_IMAGE_ASPECT_STENCIL_BIT:
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fs = build_nir_copy_fragment_shader_stencil(tex_dim);
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fs = build_nir_copy_fragment_shader_stencil(tex_dim);
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rp = device->meta_state.blit.stencil_only_rp[0];
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rendering_create_info.stencilAttachmentFormat = format;
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break;
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break;
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default:
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default:
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unreachable("Unhandled aspect");
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unreachable("Unhandled aspect");
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@@ -734,6 +713,7 @@ build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
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VkGraphicsPipelineCreateInfo vk_pipeline_info = {
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VkGraphicsPipelineCreateInfo vk_pipeline_info = {
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.pNext = &rendering_create_info,
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.stageCount = ARRAY_SIZE(pipeline_shader_stages),
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.stageCount = ARRAY_SIZE(pipeline_shader_stages),
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.pStages = pipeline_shader_stages,
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.pStages = pipeline_shader_stages,
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.pVertexInputState = &vi_create_info,
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.pVertexInputState = &vi_create_info,
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@@ -777,7 +757,7 @@ build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
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},
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},
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.flags = 0,
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.flags = 0,
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.layout = device->meta_state.blit.pipeline_layout,
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.layout = device->meta_state.blit.pipeline_layout,
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.renderPass = rp,
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.renderPass = VK_NULL_HANDLE,
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.subpass = 0,
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.subpass = 0,
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};
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};
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@@ -849,84 +829,23 @@ radv_device_init_meta_blit_color(struct radv_device *device, bool on_demand)
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VkResult result;
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VkResult result;
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for (unsigned i = 0; i < NUM_META_FS_KEYS; ++i) {
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for (unsigned i = 0; i < NUM_META_FS_KEYS; ++i) {
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unsigned key = radv_format_meta_fs_key(device, radv_fs_key_format_exemplars[i]);
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VkFormat format = radv_fs_key_format_exemplars[i];
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for (unsigned j = 0; j < RADV_META_DST_LAYOUT_COUNT; ++j) {
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unsigned key = radv_format_meta_fs_key(device, format);
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VkImageLayout layout = radv_meta_dst_layout_to_layout(j);
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result = radv_CreateRenderPass2(
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radv_device_to_handle(device),
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&(VkRenderPassCreateInfo2){
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO_2,
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.attachmentCount = 1,
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.pAttachments =
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&(VkAttachmentDescription2){
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.sType = VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_2,
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.format = radv_fs_key_format_exemplars[i],
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|
||||||
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
|
|
||||||
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
|
|
||||||
.initialLayout = layout,
|
|
||||||
.finalLayout = layout,
|
|
||||||
},
|
|
||||||
.subpassCount = 1,
|
|
||||||
.pSubpasses =
|
|
||||||
&(VkSubpassDescription2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_2,
|
|
||||||
.pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
|
|
||||||
.inputAttachmentCount = 0,
|
|
||||||
.colorAttachmentCount = 1,
|
|
||||||
.pColorAttachments =
|
|
||||||
&(VkAttachmentReference2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_2,
|
|
||||||
.attachment = 0,
|
|
||||||
.layout = layout,
|
|
||||||
},
|
|
||||||
.pResolveAttachments = NULL,
|
|
||||||
.pDepthStencilAttachment =
|
|
||||||
&(VkAttachmentReference2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_2,
|
|
||||||
.attachment = VK_ATTACHMENT_UNUSED,
|
|
||||||
.layout = VK_IMAGE_LAYOUT_GENERAL,
|
|
||||||
},
|
|
||||||
.preserveAttachmentCount = 0,
|
|
||||||
.pPreserveAttachments = NULL,
|
|
||||||
},
|
|
||||||
.dependencyCount = 2,
|
|
||||||
.pDependencies =
|
|
||||||
(VkSubpassDependency2[]){{.sType = VK_STRUCTURE_TYPE_SUBPASS_DEPENDENCY_2,
|
|
||||||
.srcSubpass = VK_SUBPASS_EXTERNAL,
|
|
||||||
.dstSubpass = 0,
|
|
||||||
.srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
|
|
||||||
.dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
|
|
||||||
.srcAccessMask = 0,
|
|
||||||
.dstAccessMask = 0,
|
|
||||||
.dependencyFlags = 0},
|
|
||||||
{.sType = VK_STRUCTURE_TYPE_SUBPASS_DEPENDENCY_2,
|
|
||||||
.srcSubpass = 0,
|
|
||||||
.dstSubpass = VK_SUBPASS_EXTERNAL,
|
|
||||||
.srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
|
|
||||||
.dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
|
|
||||||
.srcAccessMask = 0,
|
|
||||||
.dstAccessMask = 0,
|
|
||||||
.dependencyFlags = 0}},
|
|
||||||
},
|
|
||||||
&device->meta_state.alloc, &device->meta_state.blit.render_pass[key][j]);
|
|
||||||
if (result != VK_SUCCESS)
|
|
||||||
goto fail;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (on_demand)
|
if (on_demand)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_1D, key,
|
result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_1D, format,
|
||||||
&device->meta_state.blit.pipeline_1d_src[key]);
|
&device->meta_state.blit.pipeline_1d_src[key]);
|
||||||
if (result != VK_SUCCESS)
|
if (result != VK_SUCCESS)
|
||||||
goto fail;
|
goto fail;
|
||||||
|
|
||||||
result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_2D, key,
|
result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_2D, format,
|
||||||
&device->meta_state.blit.pipeline_2d_src[key]);
|
&device->meta_state.blit.pipeline_2d_src[key]);
|
||||||
if (result != VK_SUCCESS)
|
if (result != VK_SUCCESS)
|
||||||
goto fail;
|
goto fail;
|
||||||
|
|
||||||
result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_3D, key,
|
result = build_pipeline(device, VK_IMAGE_ASPECT_COLOR_BIT, GLSL_SAMPLER_DIM_3D, format,
|
||||||
&device->meta_state.blit.pipeline_3d_src[key]);
|
&device->meta_state.blit.pipeline_3d_src[key]);
|
||||||
if (result != VK_SUCCESS)
|
if (result != VK_SUCCESS)
|
||||||
goto fail;
|
goto fail;
|
||||||
@@ -942,79 +861,23 @@ radv_device_init_meta_blit_depth(struct radv_device *device, bool on_demand)
|
|||||||
{
|
{
|
||||||
VkResult result;
|
VkResult result;
|
||||||
|
|
||||||
for (enum radv_blit_ds_layout ds_layout = RADV_BLIT_DS_LAYOUT_TILE_ENABLE;
|
|
||||||
ds_layout < RADV_BLIT_DS_LAYOUT_COUNT; ds_layout++) {
|
|
||||||
VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout);
|
|
||||||
result = radv_CreateRenderPass2(
|
|
||||||
radv_device_to_handle(device),
|
|
||||||
&(VkRenderPassCreateInfo2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO_2,
|
|
||||||
.attachmentCount = 1,
|
|
||||||
.pAttachments =
|
|
||||||
&(VkAttachmentDescription2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_2,
|
|
||||||
.format = VK_FORMAT_D32_SFLOAT,
|
|
||||||
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
|
|
||||||
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
|
|
||||||
.initialLayout = layout,
|
|
||||||
.finalLayout = layout,
|
|
||||||
},
|
|
||||||
.subpassCount = 1,
|
|
||||||
.pSubpasses =
|
|
||||||
&(VkSubpassDescription2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_2,
|
|
||||||
.pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
|
|
||||||
.inputAttachmentCount = 0,
|
|
||||||
.colorAttachmentCount = 0,
|
|
||||||
.pColorAttachments = NULL,
|
|
||||||
.pResolveAttachments = NULL,
|
|
||||||
.pDepthStencilAttachment =
|
|
||||||
&(VkAttachmentReference2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_2,
|
|
||||||
.attachment = 0,
|
|
||||||
.layout = layout,
|
|
||||||
},
|
|
||||||
.preserveAttachmentCount = 0,
|
|
||||||
.pPreserveAttachments = NULL,
|
|
||||||
},
|
|
||||||
.dependencyCount = 2,
|
|
||||||
.pDependencies =
|
|
||||||
(VkSubpassDependency2[]){{.sType = VK_STRUCTURE_TYPE_SUBPASS_DEPENDENCY_2,
|
|
||||||
.srcSubpass = VK_SUBPASS_EXTERNAL,
|
|
||||||
.dstSubpass = 0,
|
|
||||||
.srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
|
|
||||||
.dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
|
|
||||||
.srcAccessMask = 0,
|
|
||||||
.dstAccessMask = 0,
|
|
||||||
.dependencyFlags = 0},
|
|
||||||
{.sType = VK_STRUCTURE_TYPE_SUBPASS_DEPENDENCY_2,
|
|
||||||
.srcSubpass = 0,
|
|
||||||
.dstSubpass = VK_SUBPASS_EXTERNAL,
|
|
||||||
.srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
|
|
||||||
.dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
|
|
||||||
.srcAccessMask = 0,
|
|
||||||
.dstAccessMask = 0,
|
|
||||||
.dependencyFlags = 0}},
|
|
||||||
},
|
|
||||||
&device->meta_state.alloc, &device->meta_state.blit.depth_only_rp[ds_layout]);
|
|
||||||
if (result != VK_SUCCESS)
|
|
||||||
goto fail;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (on_demand)
|
if (on_demand)
|
||||||
return VK_SUCCESS;
|
return VK_SUCCESS;
|
||||||
|
|
||||||
result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_1D, 0,
|
result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_1D,
|
||||||
|
VK_FORMAT_D32_SFLOAT,
|
||||||
&device->meta_state.blit.depth_only_1d_pipeline);
|
&device->meta_state.blit.depth_only_1d_pipeline);
|
||||||
if (result != VK_SUCCESS)
|
if (result != VK_SUCCESS)
|
||||||
goto fail;
|
goto fail;
|
||||||
|
|
||||||
result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_2D, 0,
|
result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_2D,
|
||||||
|
VK_FORMAT_D32_SFLOAT,
|
||||||
&device->meta_state.blit.depth_only_2d_pipeline);
|
&device->meta_state.blit.depth_only_2d_pipeline);
|
||||||
if (result != VK_SUCCESS)
|
if (result != VK_SUCCESS)
|
||||||
goto fail;
|
goto fail;
|
||||||
|
|
||||||
result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_3D, 0,
|
result = build_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT, GLSL_SAMPLER_DIM_3D,
|
||||||
|
VK_FORMAT_D32_SFLOAT,
|
||||||
&device->meta_state.blit.depth_only_3d_pipeline);
|
&device->meta_state.blit.depth_only_3d_pipeline);
|
||||||
if (result != VK_SUCCESS)
|
if (result != VK_SUCCESS)
|
||||||
goto fail;
|
goto fail;
|
||||||
@@ -1028,80 +891,23 @@ radv_device_init_meta_blit_stencil(struct radv_device *device, bool on_demand)
|
|||||||
{
|
{
|
||||||
VkResult result;
|
VkResult result;
|
||||||
|
|
||||||
for (enum radv_blit_ds_layout ds_layout = RADV_BLIT_DS_LAYOUT_TILE_ENABLE;
|
|
||||||
ds_layout < RADV_BLIT_DS_LAYOUT_COUNT; ds_layout++) {
|
|
||||||
VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout);
|
|
||||||
result = radv_CreateRenderPass2(
|
|
||||||
radv_device_to_handle(device),
|
|
||||||
&(VkRenderPassCreateInfo2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO_2,
|
|
||||||
.attachmentCount = 1,
|
|
||||||
.pAttachments =
|
|
||||||
&(VkAttachmentDescription2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_2,
|
|
||||||
.format = VK_FORMAT_S8_UINT,
|
|
||||||
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
|
|
||||||
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
|
|
||||||
.initialLayout = layout,
|
|
||||||
.finalLayout = layout,
|
|
||||||
},
|
|
||||||
.subpassCount = 1,
|
|
||||||
.pSubpasses =
|
|
||||||
&(VkSubpassDescription2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_2,
|
|
||||||
.pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
|
|
||||||
.inputAttachmentCount = 0,
|
|
||||||
.colorAttachmentCount = 0,
|
|
||||||
.pColorAttachments = NULL,
|
|
||||||
.pResolveAttachments = NULL,
|
|
||||||
.pDepthStencilAttachment =
|
|
||||||
&(VkAttachmentReference2){
|
|
||||||
.sType = VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_2,
|
|
||||||
.attachment = 0,
|
|
||||||
.layout = layout,
|
|
||||||
},
|
|
||||||
.preserveAttachmentCount = 0,
|
|
||||||
.pPreserveAttachments = NULL,
|
|
||||||
},
|
|
||||||
.dependencyCount = 2,
|
|
||||||
.pDependencies =
|
|
||||||
(VkSubpassDependency2[]){{.sType = VK_STRUCTURE_TYPE_SUBPASS_DEPENDENCY_2,
|
|
||||||
.srcSubpass = VK_SUBPASS_EXTERNAL,
|
|
||||||
.dstSubpass = 0,
|
|
||||||
.srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
|
|
||||||
.dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
|
|
||||||
.srcAccessMask = 0,
|
|
||||||
.dstAccessMask = 0,
|
|
||||||
.dependencyFlags = 0},
|
|
||||||
{.sType = VK_STRUCTURE_TYPE_SUBPASS_DEPENDENCY_2,
|
|
||||||
.srcSubpass = 0,
|
|
||||||
.dstSubpass = VK_SUBPASS_EXTERNAL,
|
|
||||||
.srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
|
|
||||||
.dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
|
|
||||||
.srcAccessMask = 0,
|
|
||||||
.dstAccessMask = 0,
|
|
||||||
.dependencyFlags = 0}},
|
|
||||||
|
|
||||||
},
|
|
||||||
&device->meta_state.alloc, &device->meta_state.blit.stencil_only_rp[ds_layout]);
|
|
||||||
}
|
|
||||||
if (result != VK_SUCCESS)
|
|
||||||
goto fail;
|
|
||||||
|
|
||||||
if (on_demand)
|
if (on_demand)
|
||||||
return VK_SUCCESS;
|
return VK_SUCCESS;
|
||||||
|
|
||||||
result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_1D, 0,
|
result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_1D,
|
||||||
|
VK_FORMAT_S8_UINT,
|
||||||
&device->meta_state.blit.stencil_only_1d_pipeline);
|
&device->meta_state.blit.stencil_only_1d_pipeline);
|
||||||
if (result != VK_SUCCESS)
|
if (result != VK_SUCCESS)
|
||||||
goto fail;
|
goto fail;
|
||||||
|
|
||||||
result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_2D, 0,
|
result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_2D,
|
||||||
|
VK_FORMAT_S8_UINT,
|
||||||
&device->meta_state.blit.stencil_only_2d_pipeline);
|
&device->meta_state.blit.stencil_only_2d_pipeline);
|
||||||
if (result != VK_SUCCESS)
|
if (result != VK_SUCCESS)
|
||||||
goto fail;
|
goto fail;
|
||||||
|
|
||||||
result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_3D, 0,
|
result = build_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT, GLSL_SAMPLER_DIM_3D,
|
||||||
|
VK_FORMAT_S8_UINT,
|
||||||
&device->meta_state.blit.stencil_only_3d_pipeline);
|
&device->meta_state.blit.stencil_only_3d_pipeline);
|
||||||
if (result != VK_SUCCESS)
|
if (result != VK_SUCCESS)
|
||||||
goto fail;
|
goto fail;
|
||||||
|
@@ -489,8 +489,6 @@ struct radv_meta_state {
|
|||||||
VkDescriptorSetLayout clear_dcc_comp_to_single_ds_layout;
|
VkDescriptorSetLayout clear_dcc_comp_to_single_ds_layout;
|
||||||
|
|
||||||
struct {
|
struct {
|
||||||
VkRenderPass render_pass[NUM_META_FS_KEYS][RADV_META_DST_LAYOUT_COUNT];
|
|
||||||
|
|
||||||
/** Pipeline that blits from a 1D image. */
|
/** Pipeline that blits from a 1D image. */
|
||||||
VkPipeline pipeline_1d_src[NUM_META_FS_KEYS];
|
VkPipeline pipeline_1d_src[NUM_META_FS_KEYS];
|
||||||
|
|
||||||
@@ -500,12 +498,10 @@ struct radv_meta_state {
|
|||||||
/** Pipeline that blits from a 3D image. */
|
/** Pipeline that blits from a 3D image. */
|
||||||
VkPipeline pipeline_3d_src[NUM_META_FS_KEYS];
|
VkPipeline pipeline_3d_src[NUM_META_FS_KEYS];
|
||||||
|
|
||||||
VkRenderPass depth_only_rp[RADV_BLIT_DS_LAYOUT_COUNT];
|
|
||||||
VkPipeline depth_only_1d_pipeline;
|
VkPipeline depth_only_1d_pipeline;
|
||||||
VkPipeline depth_only_2d_pipeline;
|
VkPipeline depth_only_2d_pipeline;
|
||||||
VkPipeline depth_only_3d_pipeline;
|
VkPipeline depth_only_3d_pipeline;
|
||||||
|
|
||||||
VkRenderPass stencil_only_rp[RADV_BLIT_DS_LAYOUT_COUNT];
|
|
||||||
VkPipeline stencil_only_1d_pipeline;
|
VkPipeline stencil_only_1d_pipeline;
|
||||||
VkPipeline stencil_only_2d_pipeline;
|
VkPipeline stencil_only_2d_pipeline;
|
||||||
VkPipeline stencil_only_3d_pipeline;
|
VkPipeline stencil_only_3d_pipeline;
|
||||||
|
Reference in New Issue
Block a user