zink: move sparse lowering up in file
no functional changes Fixes:0d652c0c8d
("zink: shrink vectors during optimization") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27414> (cherry picked from commit6a8cd7a64f
)
This commit is contained in:

committed by
Eric Engestrom

parent
751c5689f0
commit
66b0263cea
@@ -34,7 +34,7 @@
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"description": "zink: move sparse lowering up in file",
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"nominated": true,
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"nomination_type": 1,
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"resolution": 0,
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"resolution": 1,
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"main_sha": null,
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"because_sha": "0d652c0c8db33ff80d16f30b2d2e8f4413946338",
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"notes": null
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@@ -3546,6 +3546,88 @@ invert_point_coord(nir_shader *nir)
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nir_metadata_dominance, NULL);
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}
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static bool
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is_residency_code(nir_def *src)
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{
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nir_instr *parent = src->parent_instr;
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while (1) {
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if (parent->type == nir_instr_type_intrinsic) {
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ASSERTED nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent);
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assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident);
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return false;
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}
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if (parent->type == nir_instr_type_tex)
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return true;
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assert(parent->type == nir_instr_type_alu);
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nir_alu_instr *alu = nir_instr_as_alu(parent);
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parent = alu->src[0].src.ssa->parent_instr;
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}
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}
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static bool
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lower_sparse_instr(nir_builder *b, nir_intrinsic_instr *instr, void *data)
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{
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if (instr->intrinsic == nir_intrinsic_sparse_residency_code_and) {
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b->cursor = nir_before_instr(&instr->instr);
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nir_def *src0;
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if (is_residency_code(instr->src[0].ssa))
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src0 = nir_is_sparse_texels_resident(b, 1, instr->src[0].ssa);
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else
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src0 = instr->src[0].ssa;
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nir_def *src1;
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if (is_residency_code(instr->src[1].ssa))
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src1 = nir_is_sparse_texels_resident(b, 1, instr->src[1].ssa);
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else
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src1 = instr->src[1].ssa;
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nir_def *def = nir_iand(b, src0, src1);
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nir_def_rewrite_uses_after(&instr->def, def, &instr->instr);
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nir_instr_remove(&instr->instr);
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return true;
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}
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if (instr->intrinsic != nir_intrinsic_is_sparse_texels_resident)
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return false;
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/* vulkan vec can only be a vec4, but this is (maybe) vec5,
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* so just rewrite as the first component since ntv is going to use a different
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* method for storing the residency value anyway
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*/
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b->cursor = nir_before_instr(&instr->instr);
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nir_instr *parent = instr->src[0].ssa->parent_instr;
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if (is_residency_code(instr->src[0].ssa)) {
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assert(parent->type == nir_instr_type_alu);
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nir_alu_instr *alu = nir_instr_as_alu(parent);
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nir_def_rewrite_uses_after(instr->src[0].ssa, nir_channel(b, alu->src[0].src.ssa, 0), parent);
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nir_instr_remove(parent);
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} else {
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nir_def *src;
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if (parent->type == nir_instr_type_intrinsic) {
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent);
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assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident);
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src = intr->src[0].ssa;
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} else {
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assert(parent->type == nir_instr_type_alu);
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nir_alu_instr *alu = nir_instr_as_alu(parent);
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src = alu->src[0].src.ssa;
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}
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if (instr->def.bit_size != 32) {
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if (instr->def.bit_size == 1)
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src = nir_ieq_imm(b, src, 1);
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else
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src = nir_u2uN(b, src, instr->def.bit_size);
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}
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nir_def_rewrite_uses(&instr->def, src);
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nir_instr_remove(&instr->instr);
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}
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return true;
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}
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static bool
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lower_sparse(nir_shader *shader)
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{
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return nir_shader_intrinsics_pass(shader, lower_sparse_instr,
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nir_metadata_dominance, NULL);
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}
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static bool
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add_derefs_instr(nir_builder *b, nir_intrinsic_instr *intr, void *data)
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{
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@@ -4573,88 +4655,6 @@ scan_nir(struct zink_screen *screen, nir_shader *shader, struct zink_shader *zs)
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}
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}
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static bool
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is_residency_code(nir_def *src)
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{
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nir_instr *parent = src->parent_instr;
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while (1) {
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if (parent->type == nir_instr_type_intrinsic) {
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ASSERTED nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent);
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assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident);
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return false;
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}
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if (parent->type == nir_instr_type_tex)
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return true;
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assert(parent->type == nir_instr_type_alu);
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nir_alu_instr *alu = nir_instr_as_alu(parent);
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parent = alu->src[0].src.ssa->parent_instr;
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}
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}
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static bool
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lower_sparse_instr(nir_builder *b, nir_intrinsic_instr *instr, void *data)
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{
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if (instr->intrinsic == nir_intrinsic_sparse_residency_code_and) {
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b->cursor = nir_before_instr(&instr->instr);
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nir_def *src0;
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if (is_residency_code(instr->src[0].ssa))
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src0 = nir_is_sparse_texels_resident(b, 1, instr->src[0].ssa);
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else
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src0 = instr->src[0].ssa;
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nir_def *src1;
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if (is_residency_code(instr->src[1].ssa))
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src1 = nir_is_sparse_texels_resident(b, 1, instr->src[1].ssa);
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else
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src1 = instr->src[1].ssa;
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nir_def *def = nir_iand(b, src0, src1);
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nir_def_rewrite_uses_after(&instr->def, def, &instr->instr);
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nir_instr_remove(&instr->instr);
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return true;
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}
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if (instr->intrinsic != nir_intrinsic_is_sparse_texels_resident)
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return false;
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/* vulkan vec can only be a vec4, but this is (maybe) vec5,
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* so just rewrite as the first component since ntv is going to use a different
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* method for storing the residency value anyway
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*/
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b->cursor = nir_before_instr(&instr->instr);
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nir_instr *parent = instr->src[0].ssa->parent_instr;
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if (is_residency_code(instr->src[0].ssa)) {
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assert(parent->type == nir_instr_type_alu);
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nir_alu_instr *alu = nir_instr_as_alu(parent);
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nir_def_rewrite_uses_after(instr->src[0].ssa, nir_channel(b, alu->src[0].src.ssa, 0), parent);
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nir_instr_remove(parent);
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} else {
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nir_def *src;
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if (parent->type == nir_instr_type_intrinsic) {
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent);
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assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident);
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src = intr->src[0].ssa;
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} else {
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assert(parent->type == nir_instr_type_alu);
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nir_alu_instr *alu = nir_instr_as_alu(parent);
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src = alu->src[0].src.ssa;
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}
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if (instr->def.bit_size != 32) {
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if (instr->def.bit_size == 1)
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src = nir_ieq_imm(b, src, 1);
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else
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src = nir_u2uN(b, src, instr->def.bit_size);
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}
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nir_def_rewrite_uses(&instr->def, src);
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nir_instr_remove(&instr->instr);
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}
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return true;
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}
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static bool
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lower_sparse(nir_shader *shader)
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{
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return nir_shader_intrinsics_pass(shader, lower_sparse_instr,
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nir_metadata_dominance, NULL);
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}
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static bool
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match_tex_dests_instr(nir_builder *b, nir_instr *in, void *data)
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{
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