zink: move sparse lowering up in file

no functional changes

Fixes: 0d652c0c8d ("zink: shrink vectors during optimization")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27414>
(cherry picked from commit 6a8cd7a64f)
This commit is contained in:
Mike Blumenkrantz
2024-02-01 10:48:35 -05:00
committed by Eric Engestrom
parent 751c5689f0
commit 66b0263cea
2 changed files with 83 additions and 83 deletions

View File

@@ -34,7 +34,7 @@
"description": "zink: move sparse lowering up in file",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "0d652c0c8db33ff80d16f30b2d2e8f4413946338",
"notes": null

View File

@@ -3546,6 +3546,88 @@ invert_point_coord(nir_shader *nir)
nir_metadata_dominance, NULL);
}
static bool
is_residency_code(nir_def *src)
{
nir_instr *parent = src->parent_instr;
while (1) {
if (parent->type == nir_instr_type_intrinsic) {
ASSERTED nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent);
assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident);
return false;
}
if (parent->type == nir_instr_type_tex)
return true;
assert(parent->type == nir_instr_type_alu);
nir_alu_instr *alu = nir_instr_as_alu(parent);
parent = alu->src[0].src.ssa->parent_instr;
}
}
static bool
lower_sparse_instr(nir_builder *b, nir_intrinsic_instr *instr, void *data)
{
if (instr->intrinsic == nir_intrinsic_sparse_residency_code_and) {
b->cursor = nir_before_instr(&instr->instr);
nir_def *src0;
if (is_residency_code(instr->src[0].ssa))
src0 = nir_is_sparse_texels_resident(b, 1, instr->src[0].ssa);
else
src0 = instr->src[0].ssa;
nir_def *src1;
if (is_residency_code(instr->src[1].ssa))
src1 = nir_is_sparse_texels_resident(b, 1, instr->src[1].ssa);
else
src1 = instr->src[1].ssa;
nir_def *def = nir_iand(b, src0, src1);
nir_def_rewrite_uses_after(&instr->def, def, &instr->instr);
nir_instr_remove(&instr->instr);
return true;
}
if (instr->intrinsic != nir_intrinsic_is_sparse_texels_resident)
return false;
/* vulkan vec can only be a vec4, but this is (maybe) vec5,
* so just rewrite as the first component since ntv is going to use a different
* method for storing the residency value anyway
*/
b->cursor = nir_before_instr(&instr->instr);
nir_instr *parent = instr->src[0].ssa->parent_instr;
if (is_residency_code(instr->src[0].ssa)) {
assert(parent->type == nir_instr_type_alu);
nir_alu_instr *alu = nir_instr_as_alu(parent);
nir_def_rewrite_uses_after(instr->src[0].ssa, nir_channel(b, alu->src[0].src.ssa, 0), parent);
nir_instr_remove(parent);
} else {
nir_def *src;
if (parent->type == nir_instr_type_intrinsic) {
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent);
assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident);
src = intr->src[0].ssa;
} else {
assert(parent->type == nir_instr_type_alu);
nir_alu_instr *alu = nir_instr_as_alu(parent);
src = alu->src[0].src.ssa;
}
if (instr->def.bit_size != 32) {
if (instr->def.bit_size == 1)
src = nir_ieq_imm(b, src, 1);
else
src = nir_u2uN(b, src, instr->def.bit_size);
}
nir_def_rewrite_uses(&instr->def, src);
nir_instr_remove(&instr->instr);
}
return true;
}
static bool
lower_sparse(nir_shader *shader)
{
return nir_shader_intrinsics_pass(shader, lower_sparse_instr,
nir_metadata_dominance, NULL);
}
static bool
add_derefs_instr(nir_builder *b, nir_intrinsic_instr *intr, void *data)
{
@@ -4573,88 +4655,6 @@ scan_nir(struct zink_screen *screen, nir_shader *shader, struct zink_shader *zs)
}
}
static bool
is_residency_code(nir_def *src)
{
nir_instr *parent = src->parent_instr;
while (1) {
if (parent->type == nir_instr_type_intrinsic) {
ASSERTED nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent);
assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident);
return false;
}
if (parent->type == nir_instr_type_tex)
return true;
assert(parent->type == nir_instr_type_alu);
nir_alu_instr *alu = nir_instr_as_alu(parent);
parent = alu->src[0].src.ssa->parent_instr;
}
}
static bool
lower_sparse_instr(nir_builder *b, nir_intrinsic_instr *instr, void *data)
{
if (instr->intrinsic == nir_intrinsic_sparse_residency_code_and) {
b->cursor = nir_before_instr(&instr->instr);
nir_def *src0;
if (is_residency_code(instr->src[0].ssa))
src0 = nir_is_sparse_texels_resident(b, 1, instr->src[0].ssa);
else
src0 = instr->src[0].ssa;
nir_def *src1;
if (is_residency_code(instr->src[1].ssa))
src1 = nir_is_sparse_texels_resident(b, 1, instr->src[1].ssa);
else
src1 = instr->src[1].ssa;
nir_def *def = nir_iand(b, src0, src1);
nir_def_rewrite_uses_after(&instr->def, def, &instr->instr);
nir_instr_remove(&instr->instr);
return true;
}
if (instr->intrinsic != nir_intrinsic_is_sparse_texels_resident)
return false;
/* vulkan vec can only be a vec4, but this is (maybe) vec5,
* so just rewrite as the first component since ntv is going to use a different
* method for storing the residency value anyway
*/
b->cursor = nir_before_instr(&instr->instr);
nir_instr *parent = instr->src[0].ssa->parent_instr;
if (is_residency_code(instr->src[0].ssa)) {
assert(parent->type == nir_instr_type_alu);
nir_alu_instr *alu = nir_instr_as_alu(parent);
nir_def_rewrite_uses_after(instr->src[0].ssa, nir_channel(b, alu->src[0].src.ssa, 0), parent);
nir_instr_remove(parent);
} else {
nir_def *src;
if (parent->type == nir_instr_type_intrinsic) {
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent);
assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident);
src = intr->src[0].ssa;
} else {
assert(parent->type == nir_instr_type_alu);
nir_alu_instr *alu = nir_instr_as_alu(parent);
src = alu->src[0].src.ssa;
}
if (instr->def.bit_size != 32) {
if (instr->def.bit_size == 1)
src = nir_ieq_imm(b, src, 1);
else
src = nir_u2uN(b, src, instr->def.bit_size);
}
nir_def_rewrite_uses(&instr->def, src);
nir_instr_remove(&instr->instr);
}
return true;
}
static bool
lower_sparse(nir_shader *shader)
{
return nir_shader_intrinsics_pass(shader, lower_sparse_instr,
nir_metadata_dominance, NULL);
}
static bool
match_tex_dests_instr(nir_builder *b, nir_instr *in, void *data)
{