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intel: Enable CCS_E for R24_UNORM_X8_TYPELESS on TGL+

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While this format isn't listed in BSpec: 53911, other documentation and
empirical evidence suggest that it's fine to remap it to R32_FLOAT. I've
filed a bug for the BSpec page.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Nanley Chery
2019-08-08 13:40:08 -07:00
parent f93bc14618
commit 6670e07a6e
2 changed files with 2 additions and 1 deletions
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1
src/intel/common/gen_aux_map.c
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@@ -321,6 +321,7 @@ get_format_encoding(const struct isl_surf *isl_surf)
case ISL_FORMAT_R32_SINT: return 0x12;
case ISL_FORMAT_R32_UINT: return 0x13;
case ISL_FORMAT_R32_FLOAT: return 0x11;
case ISL_FORMAT_R24_UNORM_X8_TYPELESS: return 0x11;
case ISL_FORMAT_B5G6R5_UNORM: return 0xA;
case ISL_FORMAT_B5G6R5_UNORM_SRGB: return 0xA;
case ISL_FORMAT_B5G5R5A1_UNORM: return 0xA;

2
src/intel/isl/isl_format.c
View File

@@ -167,7 +167,7 @@ static const struct surface_format_info format_info[] = {
SF( Y, x, x, x, Y, x, Y, Y, x, 70, 70, 90, R32_SINT)
SF( Y, x, x, x, Y, x, Y, Y, x, 70, 70, 90, R32_UINT)
SF( Y, 50, Y, x, Y, Y, Y, Y, x, 70, 70, 90, R32_FLOAT)
SF( Y, 50, Y, x, x, x, x, x, x, x, x, x, R24_UNORM_X8_TYPELESS)
SF( Y, 50, Y, x, x, x, x, x, x, x, x, 120, R24_UNORM_X8_TYPELESS)
SF( Y, x, x, x, x, x, x, x, x, x, x, x, X24_TYPELESS_G8_UINT)
SF( Y, Y, x, x, x, x, x, x, x, x, x, x, L16A16_UNORM)
SF( Y, 50, Y, x, x, x, x, x, x, x, x, x, I24X8_UNORM)