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radv: always initialize the clear depth/stencil values to 0

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Similar to the clear color values.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset
2018-06-19 16:04:30 +02:00
parent 204cf5714a
commit 65b3fed037
3 changed files with 27 additions and 22 deletions
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6
src/amd/vulkan/radv_meta_clear.c
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@@ -645,8 +645,8 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer,
if (depth_view_can_fast_clear(cmd_buffer, iview, aspects,
subpass->depth_stencil_attachment.layout,
clear_rect, clear_value))
radv_set_ds_clear_metadata(cmd_buffer, iview->image,
clear_value, aspects);
radv_update_ds_clear_metadata(cmd_buffer, iview->image,
clear_value, aspects);
radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkViewport) {
.x = clear_rect->rect.offset.x,
@@ -745,7 +745,7 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer,
iview->image->offset + iview->image->htile_offset,
iview->image->surface.htile_size, clear_word);
radv_set_ds_clear_metadata(cmd_buffer, iview->image, clear_value, aspects);
radv_update_ds_clear_metadata(cmd_buffer, iview->image, clear_value, aspects);
if (post_flush) {
*post_flush |= flush_bits;
} else {