intel/compiler: Skip 64-bit type tests when types not available
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
@@ -1066,6 +1066,10 @@ TEST_P(validation_test, qword_low_power_align1_regioning_restrictions)
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return;
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return;
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for (unsigned i = 0; i < sizeof(inst) / sizeof(inst[0]); i++) {
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for (unsigned i = 0; i < sizeof(inst) / sizeof(inst[0]); i++) {
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if (!devinfo.has_64bit_types &&
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(type_sz(inst[i].dst_type) == 8 || type_sz(inst[i].src_type) == 8))
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continue;
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if (inst[i].opcode == BRW_OPCODE_MOV) {
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if (inst[i].opcode == BRW_OPCODE_MOV) {
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brw_MOV(p, retype(g0, inst[i].dst_type),
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brw_MOV(p, retype(g0, inst[i].dst_type),
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retype(g0, inst[i].src_type));
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retype(g0, inst[i].src_type));
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@@ -1186,6 +1190,10 @@ TEST_P(validation_test, qword_low_power_no_indirect_addressing)
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return;
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return;
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for (unsigned i = 0; i < sizeof(inst) / sizeof(inst[0]); i++) {
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for (unsigned i = 0; i < sizeof(inst) / sizeof(inst[0]); i++) {
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if (!devinfo.has_64bit_types &&
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(type_sz(inst[i].dst_type) == 8 || type_sz(inst[i].src_type) == 8))
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continue;
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if (inst[i].opcode == BRW_OPCODE_MOV) {
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if (inst[i].opcode == BRW_OPCODE_MOV) {
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brw_MOV(p, retype(g0, inst[i].dst_type),
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brw_MOV(p, retype(g0, inst[i].dst_type),
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retype(g0, inst[i].src_type));
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retype(g0, inst[i].src_type));
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@@ -1322,6 +1330,10 @@ TEST_P(validation_test, qword_low_power_no_64bit_arf)
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return;
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return;
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for (unsigned i = 0; i < sizeof(inst) / sizeof(inst[0]); i++) {
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for (unsigned i = 0; i < sizeof(inst) / sizeof(inst[0]); i++) {
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if (!devinfo.has_64bit_types &&
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(type_sz(inst[i].dst_type) == 8 || type_sz(inst[i].src_type) == 8))
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continue;
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if (inst[i].opcode == BRW_OPCODE_MOV) {
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if (inst[i].opcode == BRW_OPCODE_MOV) {
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brw_MOV(p, retype(inst[i].dst, inst[i].dst_type),
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brw_MOV(p, retype(inst[i].dst, inst[i].dst_type),
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retype(inst[i].src, inst[i].src_type));
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retype(inst[i].src, inst[i].src_type));
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@@ -1350,6 +1362,9 @@ TEST_P(validation_test, qword_low_power_no_64bit_arf)
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clear_instructions(p);
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clear_instructions(p);
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}
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}
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if (!devinfo.has_64bit_types)
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return;
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/* MAC implicitly reads the accumulator */
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/* MAC implicitly reads the accumulator */
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brw_MAC(p, retype(g0, BRW_REGISTER_TYPE_DF),
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brw_MAC(p, retype(g0, BRW_REGISTER_TYPE_DF),
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retype(stride(g0, 4, 4, 1), BRW_REGISTER_TYPE_DF),
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retype(stride(g0, 4, 4, 1), BRW_REGISTER_TYPE_DF),
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@@ -1520,6 +1535,10 @@ TEST_P(validation_test, qword_low_power_no_depctrl)
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return;
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return;
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for (unsigned i = 0; i < sizeof(inst) / sizeof(inst[0]); i++) {
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for (unsigned i = 0; i < sizeof(inst) / sizeof(inst[0]); i++) {
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if (!devinfo.has_64bit_types &&
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(type_sz(inst[i].dst_type) == 8 || type_sz(inst[i].src_type) == 8))
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continue;
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if (inst[i].opcode == BRW_OPCODE_MOV) {
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if (inst[i].opcode == BRW_OPCODE_MOV) {
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brw_MOV(p, retype(g0, inst[i].dst_type),
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brw_MOV(p, retype(g0, inst[i].dst_type),
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retype(g0, inst[i].src_type));
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retype(g0, inst[i].src_type));
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