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anv,iris: Fix input vertex max for tcs on gen12

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gen12 does away with the single patch dispatch mode for tcs, and
increases some limits so that 8_patch mode can always work. Make the
necessary changes so we don't try to fall back to single patch mode.

Fixes KHR-GL46.tessellation_shader.single.max_patch_vertices and others

Fixes: 44754279ac ("intel/fs/gen12: Use TCS 8_PATCH mode.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4843>
This commit is contained in:
D Scott Phillips
2020-04-30 23:12:07 +00:00
committed by Marge Bot
parent 8f01fa1fb3
commit 65b05ebdda
4 changed files with 10 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/gallium/drivers/iris/iris_state.c
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@@ -4178,6 +4178,8 @@ iris_store_tcs_state(struct iris_context *ice,
* more than 2 times the number of instance count.
*/
assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances);
hs.DispatchGRFStartRegisterForURBData = prog_data->dispatch_grf_start_reg & 0x1f;
hs.DispatchGRFStartRegisterForURBData5 = prog_data->dispatch_grf_start_reg >> 5;
#endif
hs.InstanceCount = tcs_prog_data->instances - 1;

2
src/intel/compiler/brw_vec4_tcs.cpp
View File

@@ -394,7 +394,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
if (compiler->use_tcs_8_patch &&
nir->info.tess.tcs_vertices_out <= (devinfo->gen >= 12 ? 32 : 16) &&
2 + has_primitive_id + key->input_vertices <= 31) {
2 + has_primitive_id + key->input_vertices <= (devinfo->gen >= 12 ? 63 : 31)) {
/* 3DSTATE_HS imposes two constraints on using 8_PATCH mode. First, the
* "Instance" field limits the number of output vertices to [1, 16] on
* gen11 and below, or [1, 32] on gen12 and above. Secondly, the

2
src/intel/genxml/gen12.xml
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@@ -1964,7 +1964,7 @@
<value name="9-12 Samplers" value="3"/>
<value name="13-16 Samplers" value="4"/>
</field>
<field name="Instance Count" start="64" end="67" type="uint"/>
<field name="Instance Count" start="64" end="68" type="uint"/>
<field name="Maximum Number of Threads" start="72" end="80" type="uint"/>
<field name="Statistics Enable" start="93" end="93" type="bool"/>
<field name="Enable" start="95" end="95" type="bool"/>

7
src/intel/vulkan/genX_pipeline.c
View File

@@ -1624,7 +1624,12 @@ emit_3dstate_hs_te_ds(struct anv_graphics_pipeline *pipeline,
hs.VertexURBEntryReadLength = 0;
hs.VertexURBEntryReadOffset = 0;
hs.DispatchGRFStartRegisterForURBData =
tcs_prog_data->base.base.dispatch_grf_start_reg;
tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f;
#if GEN_GEN >= 12
hs.DispatchGRFStartRegisterForURBData5 =
tcs_prog_data->base.base.dispatch_grf_start_reg >> 5;
#endif
hs.PerThreadScratchSpace = get_scratch_space(tcs_bin);
hs.ScratchSpaceBasePointer =