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anv: Remove state flush.

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We have all the state buffers snooped, so we don't need to clflush
everything anymore.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Rafael Antognolli
2019-01-15 15:48:43 -08:00
parent 5d61c74f3d
commit 643248b66a
10 changed files with 2 additions and 51 deletions
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2
src/intel/vulkan/anv_blorp.c
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@@ -718,8 +718,6 @@ void anv_CmdUpdateBuffer(
memcpy(tmp_data.map, pData, copy_size); memcpy(tmp_data.map, pData, copy_size);
anv_state_flush(cmd_buffer->device, tmp_data);
struct blorp_address src = { struct blorp_address src = {
.buffer = cmd_buffer->device->dynamic_state_pool.block_pool.bo, .buffer = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
.offset = tmp_data.offset, .offset = tmp_data.offset,

8
src/intel/vulkan/anv_cmd_buffer.c
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@@ -671,8 +671,6 @@ anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment); state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
memcpy(state.map, data, size); memcpy(state.map, data, size);
anv_state_flush(cmd_buffer->device, state);
VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size)); VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
return state; return state;
@@ -692,8 +690,6 @@ anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
for (uint32_t i = 0; i < dwords; i++) for (uint32_t i = 0; i < dwords; i++)
p[i] = a[i] | b[i]; p[i] = a[i] | b[i];
anv_state_flush(cmd_buffer->device, state);
VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4)); VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
return state; return state;
@@ -754,8 +750,6 @@ anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
for (unsigned i = 0; i < prog_data->nr_params; i++) for (unsigned i = 0; i < prog_data->nr_params; i++)
u32_map[i] = anv_push_constant_value(data, prog_data->param[i]); u32_map[i] = anv_push_constant_value(data, prog_data->param[i]);
anv_state_flush(cmd_buffer->device, state);
return state; return state;
} }
@@ -810,8 +804,6 @@ anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
} }
} }
anv_state_flush(cmd_buffer->device, state);
return state; return state;
} }

4
src/intel/vulkan/anv_device.c
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@@ -1512,8 +1512,6 @@ anv_state_pool_emit_data(struct anv_state_pool *pool, size_t size, size_t align,
state = anv_state_pool_alloc(pool, size, align); state = anv_state_pool_alloc(pool, size, align);
memcpy(state.map, p, size); memcpy(state.map, p, size);
anv_state_flush(pool->block_pool.device, state);
return state; return state;
} }
@@ -3073,8 +3071,6 @@ anv_fill_buffer_surface_state(struct anv_device *device, struct anv_state state,
.size_B = range, .size_B = range,
.format = format, .format = format,
.stride_B = stride); .stride_B = stride);
anv_state_flush(device, state);
} }
void anv_DestroySampler( void anv_DestroySampler(

2
src/intel/vulkan/anv_image.c
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@@ -1327,8 +1327,6 @@ anv_image_fill_surface_state(struct anv_device *device,
} }
} }
anv_state_flush(device, state_inout->state);
if (image_param_out) { if (image_param_out) {
assert(view_usage == ISL_SURF_USAGE_STORAGE_BIT); assert(view_usage == ISL_SURF_USAGE_STORAGE_BIT);
isl_surf_fill_image_param(&device->isl_dev, image_param_out, isl_surf_fill_image_param(&device->isl_dev, image_param_out,

9
src/intel/vulkan/anv_private.h
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@@ -1125,15 +1125,6 @@ anv_mocs_for_bo(const struct anv_device *device, const struct anv_bo *bo)
return device->default_mocs; return device->default_mocs;
} }
static void inline
anv_state_flush(struct anv_device *device, struct anv_state state)
{
if (device->info.has_llc)
return;
gen_flush_range(state.map, state.alloc_size);
}
void anv_device_init_blorp(struct anv_device *device); void anv_device_init_blorp(struct anv_device *device);
void anv_device_finish_blorp(struct anv_device *device); void anv_device_finish_blorp(struct anv_device *device);

3
src/intel/vulkan/gen7_cmd_buffer.c
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@@ -90,8 +90,6 @@ gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer)
GEN7_3DSTATE_SCISSOR_STATE_POINTERS, ssp) { GEN7_3DSTATE_SCISSOR_STATE_POINTERS, ssp) {
ssp.ScissorRectPointer = scissor_state.offset; ssp.ScissorRectPointer = scissor_state.offset;
} }
anv_state_flush(cmd_buffer->device, scissor_state);
} }
#endif #endif
@@ -191,7 +189,6 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
.BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff, .BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff,
}; };
GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, &cc); GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, &cc);
anv_state_flush(cmd_buffer->device, cc_state);
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) {
ccp.ColorCalcStatePointer = cc_state.offset; ccp.ColorCalcStatePointer = cc_state.offset;

8
src/intel/vulkan/gen8_cmd_buffer.c
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@@ -68,8 +68,6 @@ gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer)
&sf_clip_viewport); &sf_clip_viewport);
} }
anv_state_flush(cmd_buffer->device, sf_clip_state);
anv_batch_emit(&cmd_buffer->batch, anv_batch_emit(&cmd_buffer->batch,
GENX(3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP), clip) { GENX(3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP), clip) {
clip.SFClipViewportPointer = sf_clip_state.offset; clip.SFClipViewportPointer = sf_clip_state.offset;
@@ -97,8 +95,6 @@ gen8_cmd_buffer_emit_depth_viewport(struct anv_cmd_buffer *cmd_buffer,
GENX(CC_VIEWPORT_pack)(NULL, cc_state.map + i * 8, &cc_viewport); GENX(CC_VIEWPORT_pack)(NULL, cc_state.map + i * 8, &cc_viewport);
} }
anv_state_flush(cmd_buffer->device, cc_state);
anv_batch_emit(&cmd_buffer->batch, anv_batch_emit(&cmd_buffer->batch,
GENX(3DSTATE_VIEWPORT_STATE_POINTERS_CC), cc) { GENX(3DSTATE_VIEWPORT_STATE_POINTERS_CC), cc) {
cc.CCViewportPointer = cc_state.offset; cc.CCViewportPointer = cc_state.offset;
@@ -441,8 +437,6 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
}; };
GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, &cc); GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, &cc);
anv_state_flush(cmd_buffer->device, cc_state);
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) {
ccp.ColorCalcStatePointer = cc_state.offset; ccp.ColorCalcStatePointer = cc_state.offset;
ccp.ColorCalcStatePointerValid = true; ccp.ColorCalcStatePointerValid = true;
@@ -491,8 +485,6 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
}; };
GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, &cc); GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, &cc);
anv_state_flush(cmd_buffer->device, cc_state);
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) {
ccp.ColorCalcStatePointer = cc_state.offset; ccp.ColorCalcStatePointer = cc_state.offset;
ccp.ColorCalcStatePointerValid = true; ccp.ColorCalcStatePointerValid = true;

7
src/intel/vulkan/genX_blorp_exec.c
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@@ -132,8 +132,6 @@ blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries,
surface_offsets[i] = surface_state.offset; surface_offsets[i] = surface_state.offset;
surface_maps[i] = surface_state.map; surface_maps[i] = surface_state.map;
} }
anv_state_flush(cmd_buffer->device, bt_state);
} }
static void * static void *
@@ -191,9 +189,8 @@ blorp_get_workaround_page(struct blorp_batch *batch)
static void static void
blorp_flush_range(struct blorp_batch *batch, void *start, size_t size) blorp_flush_range(struct blorp_batch *batch, void *start, size_t size)
{ {
struct anv_device *device = batch->blorp->driver_ctx; /* We don't need to flush states anymore, since everything will be snooped.
if (!device->info.has_llc) */
gen_flush_range(start, size);
} }
static void static void

9
src/intel/vulkan/genX_cmd_buffer.c
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@@ -2251,8 +2251,6 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
assert(image == map->image_count); assert(image == map->image_count);
out: out:
anv_state_flush(cmd_buffer->device, *bt_state);
#if GEN_GEN >= 11 #if GEN_GEN >= 11
/* The PIPE_CONTROL command description says: /* The PIPE_CONTROL command description says:
* *
@@ -2324,8 +2322,6 @@ emit_samplers(struct anv_cmd_buffer *cmd_buffer,
sampler->state[binding->plane], sizeof(sampler->state[0])); sampler->state[binding->plane], sizeof(sampler->state[0]));
} }
anv_state_flush(cmd_buffer->device, *state);
return VK_SUCCESS; return VK_SUCCESS;
} }
@@ -2741,8 +2737,6 @@ emit_base_vertex_instance(struct anv_cmd_buffer *cmd_buffer,
((uint32_t *)id_state.map)[0] = base_vertex; ((uint32_t *)id_state.map)[0] = base_vertex;
((uint32_t *)id_state.map)[1] = base_instance; ((uint32_t *)id_state.map)[1] = base_instance;
anv_state_flush(cmd_buffer->device, id_state);
struct anv_address addr = { struct anv_address addr = {
.bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo, .bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
.offset = id_state.offset, .offset = id_state.offset,
@@ -2759,8 +2753,6 @@ emit_draw_index(struct anv_cmd_buffer *cmd_buffer, uint32_t draw_index)
((uint32_t *)state.map)[0] = draw_index; ((uint32_t *)state.map)[0] = draw_index;
anv_state_flush(cmd_buffer->device, state);
struct anv_address addr = { struct anv_address addr = {
.bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo, .bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
.offset = state.offset, .offset = state.offset,
@@ -3222,7 +3214,6 @@ void genX(CmdDispatchBase)(
sizes[0] = groupCountX; sizes[0] = groupCountX;
sizes[1] = groupCountY; sizes[1] = groupCountY;
sizes[2] = groupCountZ; sizes[2] = groupCountZ;
anv_state_flush(cmd_buffer->device, state);
cmd_buffer->state.compute.num_workgroups = (struct anv_address) { cmd_buffer->state.compute.num_workgroups = (struct anv_address) {
.bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo, .bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
.offset = state.offset, .offset = state.offset,

1
src/intel/vulkan/genX_pipeline.c
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@@ -1055,7 +1055,6 @@ emit_cb_state(struct anv_pipeline *pipeline,
#endif #endif
GENX(BLEND_STATE_pack)(NULL, pipeline->blend_state.map, &blend_state); GENX(BLEND_STATE_pack)(NULL, pipeline->blend_state.map, &blend_state);
anv_state_flush(device, pipeline->blend_state);
anv_batch_emit(&pipeline->batch, GENX(3DSTATE_BLEND_STATE_POINTERS), bsp) { anv_batch_emit(&pipeline->batch, GENX(3DSTATE_BLEND_STATE_POINTERS), bsp) {
bsp.BlendStatePointer = pipeline->blend_state.offset; bsp.BlendStatePointer = pipeline->blend_state.offset;