diff --git a/src/nouveau/compiler/nak/assign_regs.rs b/src/nouveau/compiler/nak/assign_regs.rs index 81d70b4f104..da9867c8420 100644 --- a/src/nouveau/compiler/nak/assign_regs.rs +++ b/src/nouveau/compiler/nak/assign_regs.rs @@ -119,7 +119,7 @@ impl SSAUseMap { pub fn add_block(&mut self, b: &BasicBlock) { for (ip, instr) in b.instrs.iter().enumerate() { match &instr.op { - Op::FSOut(op) => { + Op::RegOut(op) => { for (i, src) in op.srcs.iter().enumerate() { let out_reg = u32::try_from(i).unwrap(); if let Some(ssa) = src_ssa_ref(src) { @@ -1130,7 +1130,7 @@ impl AssignRegsBlock { Some(instr) } } - Op::FSOut(out) => { + Op::RegOut(out) => { for src in out.srcs.iter_mut() { if let Some(src_vec) = src_ssa_ref(src) { debug_assert!(src_vec.comps() == 1); diff --git a/src/nouveau/compiler/nak/from_nir.rs b/src/nouveau/compiler/nak/from_nir.rs index aebd7f8ccc3..a0ed2fe5e56 100644 --- a/src/nouveau/compiler/nak/from_nir.rs +++ b/src/nouveau/compiler/nak/from_nir.rs @@ -2364,7 +2364,7 @@ impl<'a> ShaderFromNir<'a> { } } - b.push_op(OpFSOut { srcs: srcs }); + b.push_op(OpRegOut { srcs: srcs }); } nir_intrinsic_demote => { if let ShaderStageInfo::Fragment(info) = &mut self.info.stage { diff --git a/src/nouveau/compiler/nak/ir.rs b/src/nouveau/compiler/nak/ir.rs index 46bb8db1607..6fddb0d146b 100644 --- a/src/nouveau/compiler/nak/ir.rs +++ b/src/nouveau/compiler/nak/ir.rs @@ -5974,11 +5974,11 @@ impl_display_for_op!(OpParCopy); #[repr(C)] #[derive(DstsAsSlice)] -pub struct OpFSOut { +pub struct OpRegOut { pub srcs: Vec, } -impl SrcsAsSlice for OpFSOut { +impl SrcsAsSlice for OpRegOut { fn srcs_as_slice(&self) -> &[Src] { &self.srcs } @@ -5992,9 +5992,9 @@ impl SrcsAsSlice for OpFSOut { } } -impl DisplayOp for OpFSOut { +impl DisplayOp for OpRegOut { fn fmt_op(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { - write!(f, "fs_out {{")?; + write!(f, "reg_out {{")?; for (i, src) in self.srcs.iter().enumerate() { if i > 0 { write!(f, ",")?; @@ -6004,7 +6004,7 @@ impl DisplayOp for OpFSOut { write!(f, " }}") } } -impl_display_for_op!(OpFSOut); +impl_display_for_op!(OpRegOut); #[derive(Copy, Clone, Debug, PartialEq)] pub enum OutType { @@ -6184,7 +6184,7 @@ pub enum Op { Unpin(OpUnpin), Swap(OpSwap), ParCopy(OpParCopy), - FSOut(OpFSOut), + RegOut(OpRegOut), Out(OpOut), OutFinal(OpOutFinal), Annotate(OpAnnotate), @@ -6550,7 +6550,7 @@ impl Instr { | Op::Exit(_) | Op::WarpSync(_) | Op::Bar(_) - | Op::FSOut(_) + | Op::RegOut(_) | Op::Out(_) | Op::OutFinal(_) | Op::Annotate(_) => false, @@ -6687,7 +6687,7 @@ impl Instr { | Op::Unpin(_) | Op::Swap(_) | Op::ParCopy(_) - | Op::FSOut(_) + | Op::RegOut(_) | Op::Annotate(_) => { panic!("Not a hardware opcode") } diff --git a/src/nouveau/compiler/nak/legalize.rs b/src/nouveau/compiler/nak/legalize.rs index 32355ea636b..5c4c9427a22 100644 --- a/src/nouveau/compiler/nak/legalize.rs +++ b/src/nouveau/compiler/nak/legalize.rs @@ -298,7 +298,7 @@ fn legalize_instr( | Op::PhiDsts(_) | Op::Pin(_) | Op::Unpin(_) - | Op::FSOut(_) => { + | Op::RegOut(_) => { // These are implemented by RA and can take pretty much anything // you can throw at them. debug_assert!(instr.pred.is_true()); diff --git a/src/nouveau/compiler/nak/liveness.rs b/src/nouveau/compiler/nak/liveness.rs index 9dcf29d6df0..18c59955be3 100644 --- a/src/nouveau/compiler/nak/liveness.rs +++ b/src/nouveau/compiler/nak/liveness.rs @@ -209,11 +209,11 @@ pub trait Liveness { max(max_live[file], live_at_instr[file]) }); - if let Op::FSOut(fs_out) = &instr.op { + if let Op::RegOut(reg_out) = &instr.op { // This should be the last instruction. Everything should // be dead once we've processed it. debug_assert!(live.count(RegFile::GPR) == 0); - let num_gprs_out = fs_out.srcs.len().try_into().unwrap(); + let num_gprs_out = reg_out.srcs.len().try_into().unwrap(); max_live[RegFile::GPR] = max(max_live[RegFile::GPR], num_gprs_out); }