intel/isl: Disallow CCS on 3D surfaces with miptails
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
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@@ -2807,6 +2807,30 @@ isl_surf_supports_ccs(const struct isl_device *dev,
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}
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}
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/* From the workarounds section in the SKL PRM:
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*
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* "RCC cacheline is composed of X-adjacent 64B fragments instead of
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* memory adjacent. This causes a single 128B cacheline to straddle
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* multiple LODs inside the TYF MIPtail for 3D surfaces (beyond a
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* certain slot number), leading to corruption when CCS is enabled
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* for these LODs and RT is later bound as texture. WA: If
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* RENDER_SURFACE_STATE.Surface Type = 3D and
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* RENDER_SURFACE_STATE.Auxiliary Surface Mode != AUX_NONE and
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* RENDER_SURFACE_STATE.Tiled ResourceMode is TYF or TYS, Set the
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* value of RENDER_SURFACE_STATE.Mip Tail Start LOD to a mip that
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* larger than those present in the surface (i.e. 15)"
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*
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* We simply disallow CCS on 3D surfaces with miptails.
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*
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* Referred to as Wa_1207137018 on ICL+
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*/
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if (ISL_GFX_VERX10(dev) <= 120 &&
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surf->dim == ISL_SURF_DIM_3D &&
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surf->miptail_start_level < surf->levels) {
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assert(isl_tiling_is_std_y(surf->tiling));
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return false;
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}
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if (ISL_GFX_VER(dev) >= 12) {
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if (isl_surf_usage_is_stencil(surf->usage)) {
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/* HiZ and MCS aren't allowed with stencil */
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@@ -2851,19 +2875,6 @@ isl_surf_supports_ccs(const struct isl_device *dev,
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if (surf->dim == ISL_SURF_DIM_3D)
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return false;
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/* Wa_1207137018
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*
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* TODO: implement following workaround currently covered by the
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* restriction above. If following conditions are met:
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*
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* - RENDER_SURFACE_STATE.Surface Type == 3D
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* - RENDER_SURFACE_STATE.Auxiliary Surface Mode != AUX_NONE
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* - RENDER_SURFACE_STATE.Tiled ResourceMode is TYF or TYS
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*
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* Set the value of RENDER_SURFACE_STATE.Mip Tail Start LOD to a mip
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* that larger than those present in the surface (i.e. 15)
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*/
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/* TODO: Handle the other tiling formats */
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if (surf->tiling != ISL_TILING_Y0 && surf->tiling != ISL_TILING_4 &&
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surf->tiling != ISL_TILING_64)
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