intel/isl: Disallow CCS on 3D surfaces with miptails

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
This commit is contained in:
Jason Ekstrand
2018-03-05 17:42:11 -08:00
committed by Marge Bot
parent 46f45d62d1
commit 63c86a95b2

View File

@@ -2807,6 +2807,30 @@ isl_surf_supports_ccs(const struct isl_device *dev,
}
}
/* From the workarounds section in the SKL PRM:
*
* "RCC cacheline is composed of X-adjacent 64B fragments instead of
* memory adjacent. This causes a single 128B cacheline to straddle
* multiple LODs inside the TYF MIPtail for 3D surfaces (beyond a
* certain slot number), leading to corruption when CCS is enabled
* for these LODs and RT is later bound as texture. WA: If
* RENDER_SURFACE_STATE.Surface Type = 3D and
* RENDER_SURFACE_STATE.Auxiliary Surface Mode != AUX_NONE and
* RENDER_SURFACE_STATE.Tiled ResourceMode is TYF or TYS, Set the
* value of RENDER_SURFACE_STATE.Mip Tail Start LOD to a mip that
* larger than those present in the surface (i.e. 15)"
*
* We simply disallow CCS on 3D surfaces with miptails.
*
* Referred to as Wa_1207137018 on ICL+
*/
if (ISL_GFX_VERX10(dev) <= 120 &&
surf->dim == ISL_SURF_DIM_3D &&
surf->miptail_start_level < surf->levels) {
assert(isl_tiling_is_std_y(surf->tiling));
return false;
}
if (ISL_GFX_VER(dev) >= 12) {
if (isl_surf_usage_is_stencil(surf->usage)) {
/* HiZ and MCS aren't allowed with stencil */
@@ -2851,19 +2875,6 @@ isl_surf_supports_ccs(const struct isl_device *dev,
if (surf->dim == ISL_SURF_DIM_3D)
return false;
/* Wa_1207137018
*
* TODO: implement following workaround currently covered by the
* restriction above. If following conditions are met:
*
* - RENDER_SURFACE_STATE.Surface Type == 3D
* - RENDER_SURFACE_STATE.Auxiliary Surface Mode != AUX_NONE
* - RENDER_SURFACE_STATE.Tiled ResourceMode is TYF or TYS
*
* Set the value of RENDER_SURFACE_STATE.Mip Tail Start LOD to a mip
* that larger than those present in the surface (i.e. 15)
*/
/* TODO: Handle the other tiling formats */
if (surf->tiling != ISL_TILING_Y0 && surf->tiling != ISL_TILING_4 &&
surf->tiling != ISL_TILING_64)