virgl: obtain supported number of shader sampler views from host
Modern games may use more than 16 sampler views, so get what the host actually supports, and default to 16 on old hosts that don't pass the value. Since the possible maximal value of PIPE_MAX_SHADER_SAMPLER_VIEWS doesn't fit into an uint32_t remove the binding flags, they were only used for releasing the sampler views, and this can be achieved differently. v2: Fix compilation error Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: John Bates <jbates@chromium.org> (v1) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13646>
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@@ -202,14 +202,12 @@ static void virgl_attach_res_sampler_views(struct virgl_context *vctx,
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struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
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const struct virgl_shader_binding_state *binding =
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&vctx->shader_bindings[shader_type];
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uint32_t remaining_mask = binding->view_enabled_mask;
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struct virgl_resource *res;
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while (remaining_mask) {
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int i = u_bit_scan(&remaining_mask);
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assert(binding->views[i] && binding->views[i]->texture);
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res = virgl_resource(binding->views[i]->texture);
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vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
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for (int i = 0; i < PIPE_MAX_SHADER_SAMPLER_VIEWS; ++i) {
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if (binding->views[i] && binding->views[i]->texture) {
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struct virgl_resource *res = virgl_resource(binding->views[i]->texture);
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vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
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}
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}
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}
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@@ -1033,7 +1031,6 @@ static void virgl_set_sampler_views(struct pipe_context *ctx,
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struct virgl_shader_binding_state *binding =
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&vctx->shader_bindings[shader_type];
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binding->view_enabled_mask &= ~u_bit_consecutive(start_slot, num_views);
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for (unsigned i = 0; i < num_views; i++) {
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unsigned idx = start_slot + i;
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if (views && views[i]) {
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@@ -1046,7 +1043,6 @@ static void virgl_set_sampler_views(struct pipe_context *ctx,
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} else {
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pipe_sampler_view_reference(&binding->views[idx], views[i]);
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}
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binding->view_enabled_mask |= 1 << idx;
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} else {
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pipe_sampler_view_reference(&binding->views[idx], NULL);
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}
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@@ -1426,10 +1422,11 @@ virgl_release_shader_binding(struct virgl_context *vctx,
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struct virgl_shader_binding_state *binding =
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&vctx->shader_bindings[shader_type];
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while (binding->view_enabled_mask) {
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int i = u_bit_scan(&binding->view_enabled_mask);
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pipe_sampler_view_reference(
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(struct pipe_sampler_view **)&binding->views[i], NULL);
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for (int i = 0; i < PIPE_MAX_SHADER_SAMPLER_VIEWS; ++i) {
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if (binding->views[i]) {
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pipe_sampler_view_reference(
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(struct pipe_sampler_view **)&binding->views[i], NULL);
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}
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}
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while (binding->ubo_enabled_mask) {
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@@ -53,8 +53,7 @@ struct virgl_rasterizer_state {
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};
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struct virgl_shader_binding_state {
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struct pipe_sampler_view *views[16];
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uint32_t view_enabled_mask;
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struct pipe_sampler_view *views[PIPE_MAX_SHADER_SAMPLER_VIEWS];
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struct pipe_constant_buffer ubos[PIPE_MAX_CONSTANT_BUFFERS];
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uint32_t ubo_enabled_mask;
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@@ -412,7 +412,8 @@ virgl_get_shader_param(struct pipe_screen *screen,
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case PIPE_SHADER_CAP_SUBROUTINES:
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return 1;
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case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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return 16;
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return MIN2(vscreen->caps.caps.v2.max_shader_sampler_views,
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PIPE_MAX_SHADER_SAMPLER_VIEWS);
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case PIPE_SHADER_CAP_INTEGERS:
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return vscreen->caps.caps.v1.glsl_level >= 130;
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case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
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@@ -171,6 +171,7 @@ static inline void virgl_ws_fill_new_caps_defaults(struct virgl_drm_caps *caps)
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caps->caps.v2.max_compute_work_group_invocations = 0;
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caps->caps.v2.max_compute_shared_memory_size = 0;
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caps->caps.v2.host_feature_check_version = 0;
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caps->caps.v2.max_shader_sampler_views = 16;
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}
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extern enum virgl_formats pipe_to_virgl_format(enum pipe_format format);
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@@ -598,6 +598,7 @@ struct virgl_caps_v2 {
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uint32_t max_video_memory;
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char renderer[64];
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float max_anisotropy;
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uint32_t max_shader_sampler_views;
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};
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union virgl_caps {
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