radv: emit PA_SC_LINE_CNTL as part of the rasterization state
While we are at it, remove one useless field in radv_multisample_state. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
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@@ -1110,7 +1110,6 @@ radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline,
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radv_pipeline_out_of_order_rast(pipeline, blend, pCreateInfo);
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}
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ms->pa_sc_line_cntl = S_028BDC_DX10_DIAMOND_TEST_ENA(1);
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ms->pa_sc_aa_config = 0;
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ms->db_eqaa = S_028804_HIGH_QUALITY_INTERSECTIONS(1) |
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S_028804_INCOHERENT_EQAA_READS(1) |
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@@ -3749,6 +3748,9 @@ radv_pipeline_generate_raster_state(struct radeon_cmdbuf *ctx_cs,
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S_028814_POLY_OFFSET_BACK_ENABLE(vkraster->depthBiasEnable ? 1 : 0) |
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S_028814_POLY_OFFSET_PARA_ENABLE(vkraster->depthBiasEnable ? 1 : 0);
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radeon_set_context_reg(ctx_cs, R_028BDC_PA_SC_LINE_CNTL,
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S_028BDC_DX10_DIAMOND_TEST_ENA(1));
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/* Conservative rasterization. */
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if (mode != VK_CONSERVATIVE_RASTERIZATION_MODE_DISABLED_EXT) {
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struct radv_multisample_state *ms = &pipeline->graphics.ms;
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@@ -3797,7 +3799,6 @@ radv_pipeline_generate_multisample_state(struct radeon_cmdbuf *ctx_cs,
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radeon_set_context_reg(ctx_cs, R_028804_DB_EQAA, ms->db_eqaa);
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radeon_set_context_reg(ctx_cs, R_028A48_PA_SC_MODE_CNTL_0, ms->pa_sc_mode_cntl_0);
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radeon_set_context_reg(ctx_cs, R_028A4C_PA_SC_MODE_CNTL_1, ms->pa_sc_mode_cntl_1);
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radeon_set_context_reg(ctx_cs, R_028BDC_PA_SC_LINE_CNTL, ms->pa_sc_line_cntl);
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radeon_set_context_reg(ctx_cs, R_028BE0_PA_SC_AA_CONFIG, ms->pa_sc_aa_config);
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/* The exclusion bits can be set to improve rasterization efficiency
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