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intel/compiler/fs: Simplify ddx/ddy code generation

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The brw_reg() constructor just obfuscates things here, in my opinion.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Matt Turner
2017-06-15 17:20:29 -07:00
parent bed0267ff6
commit 62cfd4c656
1 changed files with 21 additions and 42 deletions
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63
src/intel/compiler/brw_fs_generator.cpp
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@@ -1163,20 +1163,17 @@ fs_generator::generate_ddx(const fs_inst *inst,
width = BRW_WIDTH_4; width = BRW_WIDTH_4;
} }
struct brw_reg src0 = brw_reg(src.file, src.nr, 1, struct brw_reg src0 = src;
src.negate, src.abs, struct brw_reg src1 = src;
BRW_REGISTER_TYPE_F,
vstride, src0.subnr = sizeof(float);
width, src0.vstride = vstride;
BRW_HORIZONTAL_STRIDE_0, src0.width = width;
BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); src0.hstride = BRW_HORIZONTAL_STRIDE_0;
struct brw_reg src1 = brw_reg(src.file, src.nr, 0, src1.vstride = vstride;
src.negate, src.abs, src1.width = width;
BRW_REGISTER_TYPE_F, src1.hstride = BRW_HORIZONTAL_STRIDE_0;
vstride,
width,
BRW_HORIZONTAL_STRIDE_0,
BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
brw_ADD(p, dst, src0, negate(src1)); brw_ADD(p, dst, src0, negate(src1));
} }
@@ -1190,40 +1187,22 @@ fs_generator::generate_ddy(const fs_inst *inst,
{ {
if (inst->opcode == FS_OPCODE_DDY_FINE) { if (inst->opcode == FS_OPCODE_DDY_FINE) {
/* produce accurate derivatives */ /* produce accurate derivatives */
struct brw_reg src0 = brw_reg(src.file, src.nr, 0, struct brw_reg src0 = stride(src, 4, 4, 1);
src.negate, src.abs, struct brw_reg src1 = stride(src, 4, 4, 1);
BRW_REGISTER_TYPE_F, src0.swizzle = BRW_SWIZZLE_XYXY;
BRW_VERTICAL_STRIDE_4, src1.swizzle = BRW_SWIZZLE_ZWZW;
BRW_WIDTH_4,
BRW_HORIZONTAL_STRIDE_1,
BRW_SWIZZLE_XYXY, WRITEMASK_XYZW);
struct brw_reg src1 = brw_reg(src.file, src.nr, 0,
src.negate, src.abs,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_4,
BRW_WIDTH_4,
BRW_HORIZONTAL_STRIDE_1,
BRW_SWIZZLE_ZWZW, WRITEMASK_XYZW);
brw_push_insn_state(p); brw_push_insn_state(p);
brw_set_default_access_mode(p, BRW_ALIGN_16); brw_set_default_access_mode(p, BRW_ALIGN_16);
brw_ADD(p, dst, negate(src0), src1); brw_ADD(p, dst, negate(src0), src1);
brw_pop_insn_state(p); brw_pop_insn_state(p);
} else { } else {
/* replicate the derivative at the top-left pixel to other pixels */ /* replicate the derivative at the top-left pixel to other pixels */
struct brw_reg src0 = brw_reg(src.file, src.nr, 0, struct brw_reg src0 = stride(src, 4, 4, 0);
src.negate, src.abs, struct brw_reg src1 = stride(src, 4, 4, 0);
BRW_REGISTER_TYPE_F, src0.subnr = 0 * sizeof(float);
BRW_VERTICAL_STRIDE_4, src1.subnr = 2 * sizeof(float);
BRW_WIDTH_4,
BRW_HORIZONTAL_STRIDE_0,
BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
struct brw_reg src1 = brw_reg(src.file, src.nr, 2,
src.negate, src.abs,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_4,
BRW_WIDTH_4,
BRW_HORIZONTAL_STRIDE_0,
BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
brw_ADD(p, dst, negate(src0), src1); brw_ADD(p, dst, negate(src0), src1);
} }
} }