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iris: rename ring to engine

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makes more sense these days.  split from a patch by Chris Wilson
This commit is contained in:
Kenneth Graunke
2018-07-31 16:10:50 -07:00
parent 1a9651f29a
commit 621cb43f41
3 changed files with 9 additions and 9 deletions
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12
src/gallium/drivers/iris/iris_batch.c
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@@ -144,16 +144,16 @@ iris_init_batch(struct iris_batch *batch,
struct iris_screen *screen, struct iris_screen *screen,
struct iris_vtable *vtbl, struct iris_vtable *vtbl,
struct pipe_debug_callback *dbg, struct pipe_debug_callback *dbg,
uint8_t ring) uint8_t engine)
{ {
batch->screen = screen; batch->screen = screen;
batch->vtbl = vtbl; batch->vtbl = vtbl;
batch->dbg = dbg; batch->dbg = dbg;
/* ring should be one of I915_EXEC_RENDER, I915_EXEC_BLT, etc. */ /* engine should be one of I915_EXEC_RENDER, I915_EXEC_BLT, etc. */
assert((ring & ~I915_EXEC_RING_MASK) == 0); assert((engine & ~I915_EXEC_RING_MASK) == 0);
assert(util_bitcount(ring) == 1); assert(util_bitcount(engine) == 1);
batch->ring = ring; batch->engine = engine;
batch->exec_count = 0; batch->exec_count = 0;
batch->exec_array_size = 100; batch->exec_array_size = 100;
@@ -419,7 +419,7 @@ submit_batch(struct iris_batch *batch, int in_fence_fd, int *out_fence_fd)
.buffer_count = batch->exec_count, .buffer_count = batch->exec_count,
.batch_start_offset = 0, .batch_start_offset = 0,
.batch_len = batch->primary_batch_size, .batch_len = batch->primary_batch_size,
.flags = batch->ring | .flags = batch->engine |
I915_EXEC_NO_RELOC | I915_EXEC_NO_RELOC |
I915_EXEC_BATCH_FIRST | I915_EXEC_BATCH_FIRST |
I915_EXEC_HANDLE_LUT, I915_EXEC_HANDLE_LUT,

4
src/gallium/drivers/iris/iris_batch.h
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@@ -56,8 +56,8 @@ struct iris_batch {
uint32_t hw_ctx_id; uint32_t hw_ctx_id;
/** Which ring this batch targets - a I915_EXEC_RING_MASK value */ /** Which engine this batch targets - a I915_EXEC_RING_MASK value */
uint8_t ring; uint8_t engine;
/** The validation list */ /** The validation list */
struct drm_i915_gem_exec_object2 *validation_list; struct drm_i915_gem_exec_object2 *validation_list;

2
src/gallium/drivers/iris/iris_state.c
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@@ -3831,7 +3831,7 @@ get_post_sync_flags(enum pipe_control_flags flags)
} }
// XXX: compute support // XXX: compute support
#define IS_COMPUTE_PIPELINE(batch) (batch->ring != I915_EXEC_RENDER) #define IS_COMPUTE_PIPELINE(batch) (batch->engine != I915_EXEC_RENDER)
/** /**
* Emit a series of PIPE_CONTROL commands, taking into account any * Emit a series of PIPE_CONTROL commands, taking into account any