diff --git a/src/intel/compiler/brw_nir_rt.c b/src/intel/compiler/brw_nir_rt.c index 574312c1a35..0c67e14446e 100644 --- a/src/intel/compiler/brw_nir_rt.c +++ b/src/intel/compiler/brw_nir_rt.c @@ -439,11 +439,27 @@ brw_nir_create_raygen_trampoline(const struct brw_compiler *compiler, * raygen BSR address here; the global data we'll deal with later. */ b.shader->num_uniforms = 32; - nir_ssa_def *raygen_bsr_addr = + nir_ssa_def *raygen_param_bsr_addr = load_trampoline_param(&b, raygen_bsr_addr, 1, 64); + nir_ssa_def *is_indirect = + nir_i2b(&b, load_trampoline_param(&b, is_indirect, 1, 8)); nir_ssa_def *local_shift = nir_u2u32(&b, load_trampoline_param(&b, local_group_size_log2, 3, 8)); + nir_ssa_def *raygen_indirect_bsr_addr; + nir_push_if(&b, is_indirect); + { + raygen_indirect_bsr_addr = + nir_load_global_constant(&b, raygen_param_bsr_addr, + 8 /* align */, + 1 /* components */, + 64 /* bit_size */); + } + nir_pop_if(&b, NULL); + + nir_ssa_def *raygen_bsr_addr = + nir_if_phi(&b, raygen_indirect_bsr_addr, raygen_param_bsr_addr); + nir_ssa_def *global_id = nir_load_workgroup_id_zero_base(&b); nir_ssa_def *simd_channel = nir_load_subgroup_invocation(&b); nir_ssa_def *local_x = diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 0af7ea05bf3..7c5a4d06262 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -5829,7 +5829,7 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer, struct brw_rt_raygen_trampoline_params trampoline_params = { .rt_disp_globals_addr = anv_address_physical(rtdg_addr), .raygen_bsr_addr = raygen_sbt->deviceAddress, - .is_indirect = is_indirect, + .is_indirect = false, /* Only for raygen_bsr_addr */ .local_group_size_log2 = { local_size_log2[0], local_size_log2[1],