radv/uvd: uvd kernel checks for full dpb allocation.

The CTS image allocation sometimes doesn't try to allocate a complete
DPB, but the amdgpu kernel module checks for this, so always make
the DPB max sized on uvd instances.

Fixes part of video decode on Fiji/Polaris

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27186>
(cherry picked from commit df9bc11589)

src/amd/vulkan/radv_image.c

@@ -1713,6 +1713,11 @@ radv_image_create_layout(struct radv_device *device, struct radv_image_create_in
       radv_video_get_profile_alignments(device->physical_device, profile_list, &width_align, &height_align);
       image_info.width = align(image_info.width, width_align);
       image_info.height = align(image_info.height, height_align);
+
+      if (radv_has_uvd(device->physical_device) && image->vk.usage & VK_IMAGE_USAGE_VIDEO_DECODE_DPB_BIT_KHR) {
+         /* UVD and kernel demand a full DPB allocation. */
+         image_info.array_size = MIN2(16, image_info.array_size);
+      }
    }
 
    unsigned plane_count = radv_get_internal_plane_count(device->physical_device, image->vk.format);