nak: Move a few more things to VtgIoInfo

This moves clip/cull and XFB and uses the recorded attributes to figure
out writes_layer and writes_point_size.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30283>

src/nouveau/compiler/nak/api.rs

@@ -364,26 +364,18 @@ pub extern "C" fn nak_compile_shader(
                 _pad: Default::default(),
             },
         },
-        vtg: match &s.info.stage {
-            ShaderStageInfo::Geometry(_)
-            | ShaderStageInfo::Tessellation(_)
-            | ShaderStageInfo::Vertex => {
-                let writes_layer =
-                    nir.info.outputs_written & (1 << VARYING_SLOT_LAYER) != 0;
-                let writes_point_size =
-                    nir.info.outputs_written & (1 << VARYING_SLOT_PSIZ) != 0;
-                let num_clip = nir.info.clip_distance_array_size();
-                let num_cull = nir.info.cull_distance_array_size();
-                let clip_enable = (1_u32 << num_clip) - 1;
-                let cull_enable = ((1_u32 << num_cull) - 1) << num_clip;
-                nak_shader_info__bindgen_ty_2 {
-                    writes_layer,
-                    writes_point_size,
-                    clip_enable: clip_enable.try_into().unwrap(),
-                    cull_enable: cull_enable.try_into().unwrap(),
-                    xfb: unsafe { nak_xfb_from_nir(nir.xfb_info) },
-                }
-            }
+        vtg: match &s.info.io {
+            ShaderIoInfo::Vtg(io) => nak_shader_info__bindgen_ty_2 {
+                writes_layer: io.attr_written(NAK_ATTR_RT_ARRAY_INDEX),
+                writes_point_size: io.attr_written(NAK_ATTR_POINT_SIZE),
+                clip_enable: io.clip_enable.try_into().unwrap(),
+                cull_enable: io.cull_enable.try_into().unwrap(),
+                xfb: if let Some(xfb) = &io.xfb {
+                    **xfb
+                } else {
+                    unsafe { std::mem::zeroed() }
+                },
+            },
             _ => unsafe { std::mem::zeroed() },
         },
         hdr: sph::encode_header(sm.as_ref(), &s.info, fs_key),

src/nouveau/compiler/nak/from_nir.rs

@@ -133,18 +133,35 @@ fn init_info_from_nir(nir: &nir_shader) -> ShaderInfo {
             MESA_SHADER_VERTEX
             | MESA_SHADER_GEOMETRY
             | MESA_SHADER_TESS_CTRL
-            | MESA_SHADER_TESS_EVAL => ShaderIoInfo::Vtg(VtgIoInfo {
-                sysvals_in: SysValInfo::default(),
-                sysvals_in_d: 0,
-                sysvals_out: SysValInfo::default(),
-                sysvals_out_d: 0,
-                attr_in: [0; 4],
-                attr_out: [0; 4],
+            | MESA_SHADER_TESS_EVAL => {
+                let num_clip = nir.info.clip_distance_array_size();
+                let num_cull = nir.info.cull_distance_array_size();
+                let clip_enable = (1_u32 << num_clip) - 1;
+                let cull_enable = ((1_u32 << num_cull) - 1) << num_clip;
 
-                // TODO: figure out how to fill this.
-                store_req_start: u8::MAX,
-                store_req_end: 0,
-            }),
+                ShaderIoInfo::Vtg(VtgIoInfo {
+                    sysvals_in: SysValInfo::default(),
+                    sysvals_in_d: 0,
+                    sysvals_out: SysValInfo::default(),
+                    sysvals_out_d: 0,
+                    attr_in: [0; 4],
+                    attr_out: [0; 4],
+
+                    // TODO: figure out how to fill this.
+                    store_req_start: u8::MAX,
+                    store_req_end: 0,
+
+                    clip_enable: clip_enable.try_into().unwrap(),
+                    cull_enable: cull_enable.try_into().unwrap(),
+                    xfb: if nir.xfb_info.is_null() {
+                        None
+                    } else {
+                        Some(Box::new(unsafe {
+                            nak_xfb_from_nir(nir.xfb_info)
+                        }))
+                    },
+                })
+            }
             _ => panic!("Unknown shader stage"),
         },
     }

src/nouveau/compiler/nak/ir.rs

@@ -4,7 +4,7 @@
 extern crate bitview;
 extern crate nak_ir_proc;
 
-use bitview::BitMutView;
+use bitview::{BitMutView, BitView};
 use nak_bindings::*;
 
 pub use crate::builder::{Builder, InstrBuilder, SSABuilder, SSAInstrBuilder};
@@ -6336,6 +6336,9 @@ pub struct VtgIoInfo {
     pub attr_out: [u32; 4],
     pub store_req_start: u8,
     pub store_req_end: u8,
+    pub clip_enable: u8,
+    pub cull_enable: u8,
+    pub xfb: Option<Box<nak_xfb_info>>,
 }
 
 impl VtgIoInfo {
@@ -6384,6 +6387,23 @@ impl VtgIoInfo {
         self.mark_attrs(addrs, true);
     }
 
+    pub fn attr_written(&self, addr: u16) -> bool {
+        if addr < 0x080 {
+            self.sysvals_out.ab & (1 << (addr / 4)) != 0
+        } else if addr < 0x280 {
+            let attr_idx = (addr - 0x080) as usize / 4;
+            BitView::new(&self.attr_out).get_bit(attr_idx)
+        } else if addr < 0x2c0 {
+            panic!("FF color I/O not supported");
+        } else if addr < 0x300 {
+            self.sysvals_out.c & (1 << ((addr - 0x2c0) / 4)) != 0
+        } else if addr >= 0x3a0 && addr < 0x3c0 {
+            self.sysvals_out_d & (1 << ((addr - 0x3a0) / 4)) != 0
+        } else {
+            panic!("Unknown I/O address");
+        }
+    }
+
     pub fn mark_store_req(&mut self, addrs: Range<u16>) {
         let start = (addrs.start / 4).try_into().unwrap();
         let end = ((addrs.end - 1) / 4).try_into().unwrap();