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intel/nir/rt: fixup primitive id

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There is a delta index value in the hit structure, we forgot to add it
to the base value.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0465714790 ("intel/nir/rt: add more helpers for ray queries")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7565
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19346>
This commit is contained in:
Lionel Landwerlin
2022-10-27 16:56:38 +03:00
parent 13f39da71a
commit 6106396825
2 changed files with 36 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
src/intel/compiler/brw_nir_lower_rt_intrinsics.c
View File

@@ -48,6 +48,8 @@ static void
lower_rt_intrinsics_impl(nir_function_impl *impl,
const struct intel_device_info *devinfo)
{
bool progress = false;
nir_builder build;
nir_builder_init(&build, impl);
nir_builder *b = &build;
@@ -331,6 +333,8 @@ lower_rt_intrinsics_impl(nir_function_impl *impl,
continue;
}
progress = true;
if (sysval) {
nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
sysval);
@@ -339,8 +343,11 @@ lower_rt_intrinsics_impl(nir_function_impl *impl,
}
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_preserve(impl,
progress ?
nir_metadata_none :
(nir_metadata_block_index |
nir_metadata_dominance));
}
/** Lower ray-tracing system values and intrinsics

32
src/intel/compiler/brw_nir_rt_builder.h
View File

@@ -396,6 +396,7 @@ struct brw_nir_rt_mem_hit_defs {
nir_ssa_def *aabb_hit_kind; /**< Only valid for AABB geometry */
nir_ssa_def *valid;
nir_ssa_def *leaf_type;
nir_ssa_def *prim_index_delta;
nir_ssa_def *prim_leaf_index;
nir_ssa_def *bvh_level;
nir_ssa_def *front_face;
@@ -418,6 +419,8 @@ brw_nir_rt_load_mem_hit_from_addr(nir_builder *b,
defs->aabb_hit_kind = nir_channel(b, data, 1);
defs->tri_bary = nir_channels(b, data, 0x6);
nir_ssa_def *bitfield = nir_channel(b, data, 3);
defs->prim_index_delta =
nir_ubitfield_extract(b, bitfield, nir_imm_int(b, 0), nir_imm_int(b, 16));
defs->valid = nir_i2b(b, nir_iand_imm(b, bitfield, 1u << 16));
defs->leaf_type =
nir_ubitfield_extract(b, bitfield, nir_imm_int(b, 17), nir_imm_int(b, 3));
@@ -912,18 +915,31 @@ brw_nir_rt_load_primitive_id_from_hit(nir_builder *b,
nir_imm_int(b, BRW_RT_BVH_NODE_TYPE_PROCEDURAL));
}
/* The IDs are located in the leaf. Take the index of the hit.
*
* The index in dw[3] for procedural and dw[2] for quad.
*/
nir_ssa_def *prim_id_proc, *prim_id_quad;
nir_push_if(b, is_procedural);
{
/* For procedural leafs, the index is in dw[3]. */
nir_ssa_def *offset =
nir_bcsel(b, is_procedural,
nir_iadd_imm(b, nir_ishl_imm(b, defs->prim_leaf_index, 2), 12),
nir_imm_int(b, 8));
return nir_load_global(b, nir_iadd(b, defs->prim_leaf_ptr,
nir_iadd_imm(b, nir_ishl_imm(b, defs->prim_leaf_index, 2), 12);
prim_id_proc = nir_load_global(b, nir_iadd(b, defs->prim_leaf_ptr,
nir_u2u64(b, offset)),
4, /* align */ 1, 32);
}
nir_push_else(b, NULL);
{
/* For quad leafs, the index is dw[2] and there is a 16bit additional
* offset in dw[3].
*/
prim_id_quad = nir_load_global(b, nir_iadd_imm(b, defs->prim_leaf_ptr, 8),
4, /* align */ 1, 32);
prim_id_quad = nir_iadd(b,
prim_id_quad,
defs->prim_index_delta);
}
nir_pop_if(b, NULL);
return nir_if_phi(b, prim_id_proc, prim_id_quad);
}
static inline nir_ssa_def *
brw_nir_rt_acceleration_structure_to_root_node(nir_builder *b,