iris: copy over i965's cache tracking
needed to split out vtbl so I can pipe control without ice
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@@ -33,6 +33,7 @@
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#include "iris_screen.h"
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struct iris_bo;
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struct iris_context;
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#define IRIS_RESOURCE_FLAG_SHADER_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
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#define IRIS_RESOURCE_FLAG_SURFACE_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
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@@ -195,11 +196,41 @@ struct iris_shader_state {
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unsigned const_size;
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};
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struct iris_vtable {
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void (*destroy_state)(struct iris_context *ice);
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void (*init_render_context)(struct iris_screen *screen,
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struct iris_batch *batch,
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struct iris_vtable *vtbl,
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struct pipe_debug_callback *dbg);
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void (*upload_render_state)(struct iris_context *ice,
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struct iris_batch *batch,
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const struct pipe_draw_info *draw);
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void (*emit_raw_pipe_control)(struct iris_batch *batch, uint32_t flags,
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struct iris_bo *bo, uint32_t offset,
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uint64_t imm);
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unsigned (*derived_program_state_size)(enum iris_program_cache_id id);
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void (*set_derived_program_state)(const struct gen_device_info *devinfo,
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enum iris_program_cache_id cache_id,
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struct iris_compiled_shader *shader);
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void (*populate_vs_key)(const struct iris_context *ice,
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struct brw_vs_prog_key *key);
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void (*populate_tcs_key)(const struct iris_context *ice,
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struct brw_tcs_prog_key *key);
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void (*populate_tes_key)(const struct iris_context *ice,
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struct brw_tes_prog_key *key);
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void (*populate_gs_key)(const struct iris_context *ice,
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struct brw_gs_prog_key *key);
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void (*populate_fs_key)(const struct iris_context *ice,
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struct brw_wm_prog_key *key);
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};
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struct iris_context {
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struct pipe_context ctx;
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struct pipe_debug_callback dbg;
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struct iris_vtable vtbl;
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struct {
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struct iris_uncompiled_shader *uncompiled[MESA_SHADER_STAGES];
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struct iris_compiled_shader *prog[MESA_SHADER_STAGES];
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@@ -247,30 +278,6 @@ struct iris_context {
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// "I'm streaming this out at draw time and never want it again!"
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struct u_upload_mgr *dynamic_uploader;
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void (*destroy_state)(struct iris_context *ice);
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void (*init_render_context)(struct iris_screen *screen,
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struct iris_batch *batch,
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struct pipe_debug_callback *dbg);
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void (*upload_render_state)(struct iris_context *ice,
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struct iris_batch *batch,
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const struct pipe_draw_info *draw);
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void (*emit_raw_pipe_control)(struct iris_batch *batch, uint32_t flags,
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struct iris_bo *bo, uint32_t offset,
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uint64_t imm);
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unsigned (*derived_program_state_size)(enum iris_program_cache_id id);
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void (*set_derived_program_state)(const struct gen_device_info *devinfo,
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enum iris_program_cache_id cache_id,
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struct iris_compiled_shader *shader);
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void (*populate_vs_key)(const struct iris_context *ice,
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struct brw_vs_prog_key *key);
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void (*populate_tcs_key)(const struct iris_context *ice,
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struct brw_tcs_prog_key *key);
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void (*populate_tes_key)(const struct iris_context *ice,
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struct brw_tes_prog_key *key);
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void (*populate_gs_key)(const struct iris_context *ice,
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struct brw_gs_prog_key *key);
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void (*populate_fs_key)(const struct iris_context *ice,
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struct brw_wm_prog_key *key);
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} state;
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};
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@@ -299,17 +306,27 @@ void iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info);
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/* iris_pipe_control.c */
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void iris_emit_pipe_control_flush(struct iris_context *ice,
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struct iris_batch *batch,
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void iris_emit_pipe_control_flush(struct iris_batch *batch,
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uint32_t flags);
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void iris_emit_pipe_control_write(struct iris_context *ice,
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struct iris_batch *batch, uint32_t flags,
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void iris_emit_pipe_control_write(struct iris_batch *batch, uint32_t flags,
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struct iris_bo *bo, uint32_t offset,
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uint64_t imm);
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void iris_emit_end_of_pipe_sync(struct iris_context *ice,
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struct iris_batch *batch,
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void iris_emit_end_of_pipe_sync(struct iris_batch *batch,
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uint32_t flags);
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void iris_cache_sets_clear(struct iris_batch *batch);
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void iris_cache_flush_for_read(struct iris_batch *batch, struct iris_bo *bo);
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void iris_cache_flush_for_render(struct iris_batch *batch,
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struct iris_bo *bo,
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enum isl_format format,
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enum isl_aux_usage aux_usage);
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void iris_render_cache_add_bo(struct iris_batch *batch,
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struct iris_bo *bo,
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enum isl_format format,
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enum isl_aux_usage aux_usage);
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void iris_cache_flush_for_depth(struct iris_batch *batch, struct iris_bo *bo);
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void iris_depth_cache_add_bo(struct iris_batch *batch, struct iris_bo *bo);
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/* iris_state.c */
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void gen9_init_state(struct iris_context *ice);
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