nir/vtn: SPIR-V bit count opcodes (core and extension) dest size mismatches nir
SPIR-V dest sizes match the input, while nir is always int32. Insert casts from the nir op to the expected SPIR-V dest. Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
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@@ -257,7 +257,6 @@ vtn_nir_alu_op_for_spirv_opcode(struct vtn_builder *b,
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case SpvOpBitFieldSExtract: return nir_op_ibitfield_extract;
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case SpvOpBitFieldUExtract: return nir_op_ubitfield_extract;
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case SpvOpBitReverse: return nir_op_bitfield_reverse;
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case SpvOpBitCount: return nir_op_bit_count;
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case SpvOpUCountLeadingZerosINTEL: return nir_op_uclz;
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/* SpvOpUCountTrailingZerosINTEL is handled elsewhere. */
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@@ -640,6 +639,14 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
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nir_imm_int(&b->nb, 32u));
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break;
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case SpvOpBitCount: {
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/* bit_count always returns int32, but the SPIR-V opcode just says the return
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* value needs to be big enough to store the number of bits.
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*/
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dest->def = nir_u2u(&b->nb, nir_bit_count(&b->nb, src[0]), glsl_get_bit_size(dest_type));
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break;
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}
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default: {
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bool swap;
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unsigned src_bit_size = glsl_get_bit_size(vtn_src[0]->type);
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@@ -117,8 +117,11 @@ handle_alu(struct vtn_builder *b, enum OpenCLstd_Entrypoints opcode,
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unsigned num_srcs, nir_ssa_def **srcs,
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const struct glsl_type *dest_type)
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{
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return nir_build_alu(&b->nb, nir_alu_op_for_opencl_opcode(b, opcode),
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srcs[0], srcs[1], srcs[2], NULL);
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nir_ssa_def *ret = nir_build_alu(&b->nb, nir_alu_op_for_opencl_opcode(b, opcode),
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srcs[0], srcs[1], srcs[2], NULL);
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if (opcode == OpenCLstd_Popcount)
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ret = nir_u2u(&b->nb, ret, glsl_get_bit_size(dest_type));
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return ret;
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}
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static nir_ssa_def *
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