nir/vtn: SPIR-V bit count opcodes (core and extension) dest size mismatches nir

SPIR-V dest sizes match the input, while nir is always int32. Insert
casts from the nir op to the expected SPIR-V dest.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
This commit is contained in:
Jesse Natalie
2020-06-23 05:45:36 -07:00
committed by Marge Bot
parent a54695ddcb
commit 608c87afdd
2 changed files with 13 additions and 3 deletions

View File

@@ -257,7 +257,6 @@ vtn_nir_alu_op_for_spirv_opcode(struct vtn_builder *b,
case SpvOpBitFieldSExtract: return nir_op_ibitfield_extract;
case SpvOpBitFieldUExtract: return nir_op_ubitfield_extract;
case SpvOpBitReverse: return nir_op_bitfield_reverse;
case SpvOpBitCount: return nir_op_bit_count;
case SpvOpUCountLeadingZerosINTEL: return nir_op_uclz;
/* SpvOpUCountTrailingZerosINTEL is handled elsewhere. */
@@ -640,6 +639,14 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
nir_imm_int(&b->nb, 32u));
break;
case SpvOpBitCount: {
/* bit_count always returns int32, but the SPIR-V opcode just says the return
* value needs to be big enough to store the number of bits.
*/
dest->def = nir_u2u(&b->nb, nir_bit_count(&b->nb, src[0]), glsl_get_bit_size(dest_type));
break;
}
default: {
bool swap;
unsigned src_bit_size = glsl_get_bit_size(vtn_src[0]->type);

View File

@@ -117,8 +117,11 @@ handle_alu(struct vtn_builder *b, enum OpenCLstd_Entrypoints opcode,
unsigned num_srcs, nir_ssa_def **srcs,
const struct glsl_type *dest_type)
{
return nir_build_alu(&b->nb, nir_alu_op_for_opencl_opcode(b, opcode),
srcs[0], srcs[1], srcs[2], NULL);
nir_ssa_def *ret = nir_build_alu(&b->nb, nir_alu_op_for_opencl_opcode(b, opcode),
srcs[0], srcs[1], srcs[2], NULL);
if (opcode == OpenCLstd_Popcount)
ret = nir_u2u(&b->nb, ret, glsl_get_bit_size(dest_type));
return ret;
}
static nir_ssa_def *