intel/disasm/gen12: Disassemble three-source instruction source and destination regions.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
@@ -814,10 +814,12 @@ dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
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unsigned subreg_nr;
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enum brw_reg_type type;
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if (is_align1 && brw_inst_3src_a1_dst_reg_file(devinfo, inst))
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reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
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else if (devinfo->gen == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst))
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if (devinfo->gen == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst))
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reg_file = BRW_MESSAGE_REGISTER_FILE;
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else if (devinfo->gen >= 12)
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reg_file = brw_inst_3src_a1_dst_reg_file(devinfo, inst);
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else if (is_align1 && brw_inst_3src_a1_dst_reg_file(devinfo, inst))
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reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
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else
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reg_file = BRW_GENERAL_REGISTER_FILE;
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@@ -987,11 +989,16 @@ src_da16(FILE *file,
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}
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static enum brw_vertical_stride
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vstride_from_align1_3src_vstride(enum gen10_align1_3src_vertical_stride vstride)
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vstride_from_align1_3src_vstride(const struct gen_device_info *devinfo,
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enum gen10_align1_3src_vertical_stride vstride)
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{
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switch (vstride) {
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case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0;
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case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2: return BRW_VERTICAL_STRIDE_2;
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case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2:
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if (devinfo->gen >= 12)
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return BRW_VERTICAL_STRIDE_1;
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else
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return BRW_VERTICAL_STRIDE_2;
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case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4;
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case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8: return BRW_VERTICAL_STRIDE_8;
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default:
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@@ -1080,8 +1087,13 @@ src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
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bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
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if (is_align1) {
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if (brw_inst_3src_a1_src0_reg_file(devinfo, inst) ==
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BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
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if (devinfo->gen >= 12) {
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_file = brw_inst_3src_a1_src0_reg_file(devinfo, inst);
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reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
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subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst);
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type = brw_inst_3src_a1_src0_type(devinfo, inst);
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} else if (brw_inst_3src_a1_src0_reg_file(devinfo, inst) ==
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BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
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_file = BRW_GENERAL_REGISTER_FILE;
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reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
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subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst);
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@@ -1108,7 +1120,7 @@ src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
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}
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_vert_stride = vstride_from_align1_3src_vstride(
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brw_inst_3src_a1_src0_vstride(devinfo, inst));
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devinfo, brw_inst_3src_a1_src0_vstride(devinfo, inst));
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_horiz_stride = hstride_from_align1_3src_hstride(
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brw_inst_3src_a1_src0_hstride(devinfo, inst));
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_width = implied_width(_vert_stride, _horiz_stride);
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@@ -1164,8 +1176,10 @@ src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
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bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
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if (is_align1) {
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if (brw_inst_3src_a1_src1_reg_file(devinfo, inst) ==
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BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
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if (devinfo->gen >= 12) {
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_file = brw_inst_3src_a1_src1_reg_file(devinfo, inst);
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} else if (brw_inst_3src_a1_src1_reg_file(devinfo, inst) ==
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BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
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_file = BRW_GENERAL_REGISTER_FILE;
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} else {
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_file = BRW_ARCHITECTURE_REGISTER_FILE;
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@@ -1176,7 +1190,7 @@ src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
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type = brw_inst_3src_a1_src1_type(devinfo, inst);
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_vert_stride = vstride_from_align1_3src_vstride(
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brw_inst_3src_a1_src1_vstride(devinfo, inst));
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devinfo, brw_inst_3src_a1_src1_vstride(devinfo, inst));
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_horiz_stride = hstride_from_align1_3src_hstride(
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brw_inst_3src_a1_src1_hstride(devinfo, inst));
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_width = implied_width(_vert_stride, _horiz_stride);
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@@ -1232,8 +1246,13 @@ src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
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bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
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if (is_align1) {
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if (brw_inst_3src_a1_src2_reg_file(devinfo, inst) ==
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BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
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if (devinfo->gen >= 12) {
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_file = brw_inst_3src_a1_src2_reg_file(devinfo, inst);
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reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);
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subreg_nr = brw_inst_3src_a1_src2_subreg_nr(devinfo, inst);
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type = brw_inst_3src_a1_src2_type(devinfo, inst);
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} else if (brw_inst_3src_a1_src2_reg_file(devinfo, inst) ==
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BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
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_file = BRW_GENERAL_REGISTER_FILE;
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reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);
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subreg_nr = brw_inst_3src_a1_src2_subreg_nr(devinfo, inst);
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