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ci: Disable SMP on the a5xx boards.

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CPU0 comes up at some plausible freq, but the rest are at 19Mhz waiting
for cpufreq to come up, which has not been upstreamed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5115>
This commit is contained in:
Eric Anholt
2020-05-19 16:33:10 -07:00
committed by Marge Bot
parent d1b7462849
commit 6033c10092
1 changed files with 3 additions and 1 deletions
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4
.gitlab-ci.yml
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@@ -874,7 +874,9 @@ arm64_a530_gles2:
variables:
BM_KERNEL: /lava-files/db820c-kernel
BM_DTB: /lava-files/db820c.dtb
BM_CMDLINE: "ip=dhcp console=ttyMSM0,115200n8"
# Disable SMP because only CPU 0 is at a freq higher than 19mhz on
# current upstream kernel.
BM_CMDLINE: "ip=dhcp console=ttyMSM0,115200n8 nosmp"
DEQP_EXPECTED_FAILS: deqp-freedreno-a530-fails.txt
DEQP_SKIPS: deqp-freedreno-a530-skips.txt
DEQP_EXPECTED_RENDERER: FD530