i965/fs: Make fs_reg::effective_width take fs_inst* instead of fs_visitor*
Now that we have execution sizes, we can use that instead of the dispatch width. This way it also works for 8-wide instructions in SIMD16. i965/fs: Make effective_width a variable instead of a function i965/fs: Preserve effective width in constant propagation Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
@@ -90,6 +90,30 @@ fs_inst::init(enum opcode opcode, uint8_t exec_size, const fs_reg &dst,
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}
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}
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assert(this->exec_size != 0);
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assert(this->exec_size != 0);
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for (int i = 0; i < sources; ++i) {
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switch (this->src[i].file) {
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case BAD_FILE:
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this->src[i].effective_width = 8;
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break;
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case GRF:
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case HW_REG:
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assert(this->src[i].width > 0);
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if (this->src[i].width == 1) {
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this->src[i].effective_width = this->exec_size;
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} else {
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this->src[i].effective_width = this->src[i].width;
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}
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break;
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case IMM:
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case UNIFORM:
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this->src[i].effective_width = this->exec_size;
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break;
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default:
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unreachable("Invalid source register file");
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}
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}
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this->dst.effective_width = this->exec_size;
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this->conditional_mod = BRW_CONDITIONAL_NONE;
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this->conditional_mod = BRW_CONDITIONAL_NONE;
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/* This will be the case for almost all instructions. */
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/* This will be the case for almost all instructions. */
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@@ -352,7 +376,7 @@ fs_visitor::LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources)
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* dealing with whole registers. If this ever changes, we can deal
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* dealing with whole registers. If this ever changes, we can deal
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* with it later.
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* with it later.
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*/
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*/
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int size = src[i].effective_width(this) * type_sz(src[i].type);
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int size = src[i].effective_width * type_sz(src[i].type);
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assert(size % 32 == 0);
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assert(size % 32 == 0);
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inst->regs_written += (size + 31) / 32;
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inst->regs_written += (size + 31) / 32;
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}
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}
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@@ -580,28 +604,6 @@ fs_reg::equals(const fs_reg &r) const
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stride == r.stride);
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stride == r.stride);
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}
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}
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uint8_t
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fs_reg::effective_width(const fs_visitor *v) const
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{
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switch (this->file) {
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case BAD_FILE:
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return 8;
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case UNIFORM:
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case IMM:
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assert(this->width == 1);
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return v->dispatch_width;
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case GRF:
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case HW_REG:
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assert(this->width > 1 && this->width <= v->dispatch_width);
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assert(this->width % 8 == 0);
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return this->width;
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case MRF:
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unreachable("MRF registers cannot be used as sources");
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default:
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unreachable("Invalid register file");
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}
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}
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fs_reg &
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fs_reg &
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fs_reg::apply_stride(unsigned stride)
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fs_reg::apply_stride(unsigned stride)
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{
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{
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@@ -2994,7 +2996,7 @@ fs_visitor::lower_load_payload()
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fs_reg dst = inst->dst;
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fs_reg dst = inst->dst;
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for (int i = 0; i < inst->sources; i++) {
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for (int i = 0; i < inst->sources; i++) {
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dst.width = inst->src[i].effective_width(this);
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dst.width = inst->src[i].effective_width;
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dst.type = inst->src[i].type;
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dst.type = inst->src[i].type;
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if (inst->src[i].file == BAD_FILE) {
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if (inst->src[i].file == BAD_FILE) {
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@@ -62,6 +62,7 @@ namespace brw {
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class fs_live_variables;
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class fs_live_variables;
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}
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}
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class fs_inst;
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class fs_visitor;
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class fs_visitor;
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class fs_reg : public backend_reg {
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class fs_reg : public backend_reg {
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@@ -110,7 +111,7 @@ public:
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* effectively take on the width of the instruction in which they are
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* effectively take on the width of the instruction in which they are
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* used.
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* used.
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*/
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*/
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uint8_t effective_width(const fs_visitor *v) const;
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uint8_t effective_width;
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/** Register region horizontal stride */
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/** Register region horizontal stride */
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uint8_t stride;
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uint8_t stride;
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@@ -450,9 +450,12 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
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if (inst->src[i].negate || inst->src[i].abs)
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if (inst->src[i].negate || inst->src[i].abs)
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continue;
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continue;
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fs_reg val = entry->src;
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val.effective_width = inst->src[i].effective_width;
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switch (inst->opcode) {
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switch (inst->opcode) {
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case BRW_OPCODE_MOV:
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case BRW_OPCODE_MOV:
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inst->src[i] = entry->src;
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inst->src[i] = val;
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progress = true;
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progress = true;
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break;
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break;
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@@ -468,7 +471,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
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case BRW_OPCODE_SHR:
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case BRW_OPCODE_SHR:
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case BRW_OPCODE_SUBB:
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case BRW_OPCODE_SUBB:
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if (i == 1) {
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if (i == 1) {
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inst->src[i] = entry->src;
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inst->src[i] = val;
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progress = true;
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progress = true;
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}
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}
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break;
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break;
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@@ -481,7 +484,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
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case BRW_OPCODE_XOR:
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case BRW_OPCODE_XOR:
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case BRW_OPCODE_ADDC:
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case BRW_OPCODE_ADDC:
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if (i == 1) {
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if (i == 1) {
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inst->src[i] = entry->src;
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inst->src[i] = val;
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progress = true;
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progress = true;
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} else if (i == 0 && inst->src[1].file != IMM) {
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} else if (i == 0 && inst->src[1].file != IMM) {
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/* Fit this constant in by commuting the operands.
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/* Fit this constant in by commuting the operands.
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@@ -494,7 +497,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
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inst->src[1].type == BRW_REGISTER_TYPE_UD))
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inst->src[1].type == BRW_REGISTER_TYPE_UD))
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break;
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break;
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inst->src[0] = inst->src[1];
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inst->src[0] = inst->src[1];
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inst->src[1] = entry->src;
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inst->src[1] = val;
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progress = true;
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progress = true;
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}
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}
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break;
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break;
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@@ -502,7 +505,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
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case BRW_OPCODE_CMP:
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case BRW_OPCODE_CMP:
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case BRW_OPCODE_IF:
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case BRW_OPCODE_IF:
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if (i == 1) {
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if (i == 1) {
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inst->src[i] = entry->src;
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inst->src[i] = val;
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progress = true;
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progress = true;
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} else if (i == 0 && inst->src[1].file != IMM) {
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} else if (i == 0 && inst->src[1].file != IMM) {
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enum brw_conditional_mod new_cmod;
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enum brw_conditional_mod new_cmod;
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@@ -513,7 +516,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
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* flipping the test
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* flipping the test
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*/
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*/
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inst->src[0] = inst->src[1];
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inst->src[0] = inst->src[1];
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inst->src[1] = entry->src;
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inst->src[1] = val;
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inst->conditional_mod = new_cmod;
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inst->conditional_mod = new_cmod;
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progress = true;
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progress = true;
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}
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}
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@@ -522,11 +525,11 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
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case BRW_OPCODE_SEL:
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case BRW_OPCODE_SEL:
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if (i == 1) {
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if (i == 1) {
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inst->src[i] = entry->src;
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inst->src[i] = val;
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progress = true;
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progress = true;
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} else if (i == 0 && inst->src[1].file != IMM) {
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} else if (i == 0 && inst->src[1].file != IMM) {
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inst->src[0] = inst->src[1];
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inst->src[0] = inst->src[1];
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inst->src[1] = entry->src;
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inst->src[1] = val;
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/* If this was predicated, flipping operands means
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/* If this was predicated, flipping operands means
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* we also need to flip the predicate.
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* we also need to flip the predicate.
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@@ -548,14 +551,14 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
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assert(i == 0);
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assert(i == 0);
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if (inst->src[0].fixed_hw_reg.dw1.f != 0.0f) {
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if (inst->src[0].fixed_hw_reg.dw1.f != 0.0f) {
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inst->opcode = BRW_OPCODE_MOV;
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inst->opcode = BRW_OPCODE_MOV;
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inst->src[0] = entry->src;
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inst->src[0] = val;
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inst->src[0].fixed_hw_reg.dw1.f = 1.0f / inst->src[0].fixed_hw_reg.dw1.f;
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inst->src[0].fixed_hw_reg.dw1.f = 1.0f / inst->src[0].fixed_hw_reg.dw1.f;
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progress = true;
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progress = true;
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}
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}
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break;
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break;
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case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
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case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
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inst->src[i] = entry->src;
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inst->src[i] = val;
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progress = true;
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progress = true;
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break;
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break;
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@@ -639,13 +642,13 @@ fs_visitor::opt_copy_propagate_local(void *copy_prop_ctx, bblock_t *block,
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inst->dst.file == GRF) {
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inst->dst.file == GRF) {
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int offset = 0;
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int offset = 0;
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for (int i = 0; i < inst->sources; i++) {
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for (int i = 0; i < inst->sources; i++) {
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int regs_written = ((inst->src[i].effective_width(this) *
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int regs_written = ((inst->src[i].effective_width *
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type_sz(inst->src[i].type)) + 31) / 32;
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type_sz(inst->src[i].type)) + 31) / 32;
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if (inst->src[i].file == GRF) {
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if (inst->src[i].file == GRF) {
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acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
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acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
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entry->dst = inst->dst;
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entry->dst = inst->dst;
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entry->dst.reg_offset = offset;
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entry->dst.reg_offset = offset;
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entry->dst.width = inst->src[i].effective_width(this);
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entry->dst.width = inst->src[i].effective_width;
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entry->src = inst->src[i];
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entry->src = inst->src[i];
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entry->regs_written = regs_written;
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entry->regs_written = regs_written;
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entry->opcode = inst->opcode;
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entry->opcode = inst->opcode;
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