From 5f3d784c6c4476db58ebc4d0d39ec2efa5649c37 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Thu, 6 Jul 2023 16:26:37 -0400 Subject: [PATCH] agx: Handle 8-bit vecs These should "just" work, promoting the 8-bit channels to 16-bit registers internally, allowing us to use our 8-bit stores with 8-bit data vectors packed in 16-bit registers. All other non-conversion ALU gets lowered by the previous patch, this is just needed for simple things like nir_op_vec of lowered math passed to a vectorized store. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/compiler/agx_compile.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c index 8f1911bd6b3..ef1be584ecf 100644 --- a/src/asahi/compiler/agx_compile.c +++ b/src/asahi/compiler/agx_compile.c @@ -1202,7 +1202,8 @@ agx_emit_alu(agx_builder *b, nir_alu_instr *instr) ASSERTED unsigned comps = nir_dest_num_components(instr->dest.dest); assert(comps == 1 || nir_op_is_vec(instr->op)); - assert(sz == 1 || sz == 16 || sz == 32 || sz == 64); + assert(sz == 1 || (nir_op_is_vec(instr->op) && sz == 8) || sz == 16 || + sz == 32 || sz == 64); agx_index dst = agx_dest_index(&instr->dest.dest); agx_index s0 = srcs > 0 ? agx_alu_src_index(b, instr->src[0]) : agx_null();