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freedreno/fdl: Increase alignment for UBWC images

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From empirical tests (on a660) R8G8 with UBWC enabled requires 256b
alignment, otherwise there would be a GPU fault during blits.

Set alignment to 4096 for all UBWC images since that's what blob does
and this area is heavily undertested.

Fixes GPU fault in Borderlands 3 running through DXVK.

cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19298>
This commit is contained in:
Danylo Piliaiev
2022-10-25 13:49:32 +02:00
committed by Marge Bot
parent d4b43d1bcf
commit 5eaca461a7
1 changed files with 6 additions and 4 deletions
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10
src/freedreno/fdl/fd6_layout.c
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@@ -83,11 +83,13 @@ fdl6_tile_alignment(struct fdl_layout *layout, uint32_t *heightalign)
layout->pitchalign = 2; layout->pitchalign = 2;
} }
/* note: this base_align is *probably* not always right, /* Empirical evidence suggests that images with UBWC could have much
* it doesn't really get tested. for example with UBWC we might * looser alignment requirements, however the validity of alignment is
* want 4k alignment, since we align UBWC levels to 4k * heavily undertested and the "officially" supported alignment is 4096b.
*/ */
if (layout->cpp == 1) if (layout->ubwc)
layout->base_align = 4096;
else if (layout->cpp == 1)
layout->base_align = 64; layout->base_align = 64;
else if (layout->cpp == 2) else if (layout->cpp == 2)
layout->base_align = 128; layout->base_align = 128;