radeon/r600: Fix remaining warnings when building 64 bit binary.
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@@ -304,6 +304,7 @@ static int r600_cs_set_age(struct radeon_cs *cs) /* -------------- */
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return 0;
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}
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#if 0
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static void dump_cmdbuf(struct radeon_cs *cs)
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{
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int i;
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@@ -314,6 +315,7 @@ static void dump_cmdbuf(struct radeon_cs *cs)
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fprintf(stderr,"--end--\n");
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}
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#endif
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static int r600_cs_emit(struct radeon_cs *cs)
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{
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@@ -2132,7 +2132,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
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alu_instruction_ptr->m_Word1_OP2.f6.write_mask = pAsm->D.dst.writew;
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break;
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default:
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alu_instruction_ptr->m_Word1_OP2.f6.write_mask = SQ_SEL_MASK;
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alu_instruction_ptr->m_Word1_OP2.f6.write_mask = 1; //SQ_SEL_MASK;
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break;
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}
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alu_instruction_ptr->m_Word1_OP2.f6.omod = SQ_ALU_OMOD_OFF;
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@@ -2161,7 +2161,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
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alu_instruction_ptr->m_Word1_OP2.f.write_mask = pAsm->D.dst.writew;
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break;
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default:
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alu_instruction_ptr->m_Word1_OP2.f.write_mask = SQ_SEL_MASK;
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alu_instruction_ptr->m_Word1_OP2.f.write_mask = 1; //SQ_SEL_MASK;
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break;
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}
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alu_instruction_ptr->m_Word1_OP2.f.omod = SQ_ALU_OMOD_OFF;
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@@ -54,11 +54,12 @@ void rcommonBeginBatch(radeonContextPtr rmesa,
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*/
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#define OUT_BATCH_RELOC(data, bo, offset, rd, wd, flags) \
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do { \
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if (0 && offset) { \
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int __offset = (offset); \
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if (0 && __offset) { \
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fprintf(stderr, "(%s:%s:%d) offset : %d\n", \
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__FILE__, __FUNCTION__, __LINE__, offset); \
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__FILE__, __FUNCTION__, __LINE__, __offset); \
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} \
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radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, offset); \
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radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, __offset); \
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radeon_cs_write_reloc(b_l_rmesa->cmdbuf.cs, \
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bo, rd, wd, flags); \
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if (!b_l_rmesa->radeonScreen->kernel_mm) \
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@@ -333,7 +333,7 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
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foreach(dma_bo, &rmesa->dma.reserved)
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++reserved;
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fprintf(stderr, "%s: free %u, wait %u, reserved %u, minimum_size: %u\n",
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fprintf(stderr, "%s: free %zu, wait %zu, reserved %zu, minimum_size: %zu\n",
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__FUNCTION__, free, wait, reserved, rmesa->dma.minimum_size);
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}
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