From 5ce4017a2bf76c2879521e9a6c272d8257133070 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 13 Dec 2021 11:13:40 +0100 Subject: [PATCH] radv,aco: do not disable anisotropy filtering for non-mipmap images This fixes dEQP-VK.texture.filtering_anisotropy.single_level.anisotropy_*.mag_linear_min_linear. Signed-off-by: Samuel Pitoiset Reviewed-by: Rhys Perry Part-of: --- .../compiler/aco_instruction_selection.cpp | 21 ------------------- src/amd/vulkan/radv_device.c | 7 ++----- src/amd/vulkan/radv_image.c | 10 --------- src/amd/vulkan/radv_nir_to_llvm.c | 2 +- 4 files changed, 3 insertions(+), 37 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 7366cbb4fef..0ccfc150e66 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -9097,27 +9097,6 @@ tex_fetch_ptrs(isel_context* ctx, nir_tex_instr* instr, Temp* res_ptr, Temp* sam } if (samp_ptr) { *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, ACO_DESC_SAMPLER, instr, false); - - if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT && ctx->options->chip_class < GFX8) { - /* fix sampler aniso on SI/CI: samp[0] = samp[0] & img[7] */ - Builder bld(ctx->program, ctx->block); - - /* to avoid unnecessary moves, we split and recombine sampler and image */ - Temp img[8] = {bld.tmp(s1), bld.tmp(s1), bld.tmp(s1), bld.tmp(s1), - bld.tmp(s1), bld.tmp(s1), bld.tmp(s1), bld.tmp(s1)}; - Temp samp[4] = {bld.tmp(s1), bld.tmp(s1), bld.tmp(s1), bld.tmp(s1)}; - bld.pseudo(aco_opcode::p_split_vector, Definition(img[0]), Definition(img[1]), - Definition(img[2]), Definition(img[3]), Definition(img[4]), Definition(img[5]), - Definition(img[6]), Definition(img[7]), *res_ptr); - bld.pseudo(aco_opcode::p_split_vector, Definition(samp[0]), Definition(samp[1]), - Definition(samp[2]), Definition(samp[3]), *samp_ptr); - - samp[0] = bld.sop2(aco_opcode::s_and_b32, bld.def(s1), bld.def(s1, scc), samp[0], img[7]); - *res_ptr = bld.pseudo(aco_opcode::p_create_vector, bld.def(s8), img[0], img[1], img[2], - img[3], img[4], img[5], img[6], img[7]); - *samp_ptr = bld.pseudo(aco_opcode::p_create_vector, bld.def(s4), samp[0], samp[1], samp[2], - samp[3]); - } } } diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 87a2712f789..d5fb9ad0555 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -7400,13 +7400,10 @@ radv_init_sampler(struct radv_device *device, struct radv_sampler *sampler, sampler->state[3] = (S_008F3C_BORDER_COLOR_PTR(border_color_ptr) | S_008F3C_BORDER_COLOR_TYPE(radv_tex_bordercolor(border_color))); - if (device->physical_device->rad_info.chip_class >= GFX10) { - sampler->state[2] |= S_008F38_ANISO_OVERRIDE_GFX10(1); - } else { + if (device->physical_device->rad_info.chip_class < GFX10) { sampler->state[2] |= S_008F38_DISABLE_LSB_CEIL(device->physical_device->rad_info.chip_class <= GFX8) | - S_008F38_FILTER_PREC_FIX(1) | - S_008F38_ANISO_OVERRIDE_GFX8(device->physical_device->rad_info.chip_class >= GFX8); + S_008F38_FILTER_PREC_FIX(1); } } diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index c6d7d2b3ad8..ac030a5b357 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -1175,16 +1175,6 @@ si_make_texture_descriptor(struct radv_device *device, struct radv_image *image, if (!(image->planes[0].surface.flags & RADEON_SURF_Z_OR_SBUFFER) && image->planes[0].surface.meta_offset) { state[6] = S_008F28_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(device, vk_format)); - } else { - /* The last dword is unused by hw. The shader uses it to clear - * bits in the first dword of sampler state. - */ - if (device->physical_device->rad_info.chip_class <= GFX7 && image->info.samples <= 1) { - if (first_level == last_level) - state[7] = C_008F30_MAX_ANISO_RATIO; - else - state[7] = 0xffffffff; - } } /* Initialize the sampler view for FMASK. */ diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index c6f43a6fce9..21acf413705 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -2399,7 +2399,7 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm, ctx.abi.clamp_shadow_reference = false; ctx.abi.adjust_frag_coord_z = options->adjust_frag_coord_z; ctx.abi.robust_buffer_access = options->robust_buffer_access; - ctx.abi.disable_aniso_single_level = true; + ctx.abi.disable_aniso_single_level = false; bool is_ngg = is_pre_gs_stage(shaders[0]->info.stage) && info->is_ngg; if (shader_count >= 2 || is_ngg)