intel/compiler: Lower 8-bit ops to 16-bit in NIR on all platforms
This fixes the Crucible func.shader.shift.int8_t test on Gen8 and Gen9. See https://gitlab.freedesktop.org/mesa/crucible/-/merge_requests/76. With the previous optimizations in place, this change seems to improve the quality of the generated code. Comparing a couple Vulkan CTS tests on Skylake had the following results. dEQP-VK.spirv_assembly.type.vec3.i8.bitwise_xor_frag: SIMD8 shader: 36 instructions. 1 loops. 3822 cycles. 0:0 spills:fills, 5 sends SIMD8 shader: 27 instructions. 1 loops. 2742 cycles. 0:0 spills:fills, 5 sends dEQP-VK.spirv_assembly.type.vec3.i8.max_frag: SIMD8 shader: 39 instructions. 1 loops. 3922 cycles. 0:0 spills:fills, 5 sends SIMD8 shader: 37 instructions. 1 loops. 3682 cycles. 0:0 spills:fills, 5 sends Reviewed-by: Francisco Jerez <currojerez@riseup.net> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9025>
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@@ -193,9 +193,6 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
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nir_options->lower_int64_options = int64_options;
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nir_options->lower_doubles_options = fp64_options;
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/* Starting with Gfx11, we lower away 8-bit arithmetic */
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nir_options->support_8bit_alu = devinfo->ver < 11;
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nir_options->unify_interfaces = i < MESA_SHADER_FRAGMENT;
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nir_options->force_indirect_unrolling |=
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@@ -993,8 +993,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
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default:
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for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
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assert((devinfo->ver == 8 || devinfo->ver == 9) ||
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type_sz(op[i].type) > 1);
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assert(type_sz(op[i].type) > 1);
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}
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}
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#endif
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@@ -1836,6 +1835,35 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
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case nir_op_bitfield_insert:
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unreachable("not reached: should have been lowered");
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/* For all shift operations:
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*
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* Gen4 - Gen7: After application of source modifiers, the low 5-bits of
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* src1 are used an unsigned value for the shift count.
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*
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* Gen8: As with earlier platforms, but for Q and UQ types on src0, the low
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* 6-bit of src1 are used.
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*
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* Gen9+: The low bits of src1 matching the size of src0 (e.g., 4-bits for
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* W or UW src0).
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*
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* The implication is that the following instruction will produce a
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* different result on Gen9+ than on previous platforms:
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*
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* shr(8) g4<1>UW g12<8,8,1>UW 0x0010UW
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*
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* where Gen9+ will shift by zero, and earlier platforms will shift by 16.
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*
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* This does not seem to be the case. Experimentally, it has been
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* determined that shifts of 16-bit values on Gen8 behave properly. Shifts
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* of 8-bit values on both Gen8 and Gen9 do not. Gen11+ lowers 8-bit
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* values, so those platforms were not tested. No features expose access
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* to 8- or 16-bit types on Gen7 or earlier, so those platforms were not
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* tested either. See
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* https://gitlab.freedesktop.org/mesa/crucible/-/merge_requests/76.
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*
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* This is part of the reason 8-bit values are lowered to 16-bit on all
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* platforms.
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*/
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case nir_op_ishl:
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bld.SHL(result, op[0], op[1]);
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break;
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@@ -675,15 +675,14 @@ lower_bit_size_callback(const nir_instr *instr, UNUSED void *data)
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assert(!"Should have been lowered by nir_opt_algebraic.");
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return 0;
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default:
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if (devinfo->ver >= 11) {
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if (nir_op_infos[alu->op].num_inputs >= 2 &&
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alu->dest.dest.ssa.bit_size == 8)
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return 16;
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if (nir_op_infos[alu->op].num_inputs >= 2 &&
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alu->dest.dest.ssa.bit_size == 8)
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return 16;
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if (nir_alu_instr_is_comparison(alu) &&
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alu->src[0].src.ssa->bit_size == 8)
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return 16;
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if (nir_alu_instr_is_comparison(alu) &&
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alu->src[0].src.ssa->bit_size == 8)
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return 16;
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}
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return 0;
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}
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break;
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@@ -704,7 +703,7 @@ lower_bit_size_callback(const nir_instr *instr, UNUSED void *data)
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case nir_intrinsic_quad_swap_horizontal:
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case nir_intrinsic_quad_swap_vertical:
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case nir_intrinsic_quad_swap_diagonal:
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if (intrin->src[0].ssa->bit_size == 8 && devinfo->ver >= 11)
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if (intrin->src[0].ssa->bit_size == 8)
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return 16;
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return 0;
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@@ -737,7 +736,7 @@ lower_bit_size_callback(const nir_instr *instr, UNUSED void *data)
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case nir_instr_type_phi: {
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nir_phi_instr *phi = nir_instr_as_phi(instr);
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if (devinfo->ver >= 11 && phi->dest.ssa.bit_size == 8)
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if (phi->dest.ssa.bit_size == 8)
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return 16;
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return 0;
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}
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