diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 0b10fb2e2b4..76ee81ec074 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -3179,6 +3179,12 @@ typedef struct nir_lower_tex_options { */ bool lower_txd_offset_clamp; + /** + * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the + * sampler index is not statically determinable to be less than 16. + */ + bool lower_txd_clamp_if_sampler_index_not_lt_16; + /** * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's * mixed-up tg4 locations. diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c index 7c6eafed2f9..903b975d6c3 100644 --- a/src/compiler/nir/nir_lower_tex.c +++ b/src/compiler/nir/nir_lower_tex.c @@ -905,6 +905,25 @@ lower_tex_packing(nir_builder *b, nir_tex_instr *tex, color->parent_instr); } +static bool +sampler_index_lt(nir_tex_instr *tex, unsigned max) +{ + assert(nir_tex_instr_src_index(tex, nir_tex_src_sampler_deref) == -1); + + unsigned sampler_index = tex->sampler_index; + + int sampler_offset_idx = + nir_tex_instr_src_index(tex, nir_tex_src_sampler_offset); + if (sampler_offset_idx >= 0) { + if (!nir_src_is_const(tex->src[sampler_offset_idx].src)) + return false; + + sampler_index += nir_src_as_uint(tex->src[sampler_offset_idx].src); + } + + return sampler_index < max; +} + static bool nir_lower_tex_block(nir_block *block, nir_builder *b, const nir_lower_tex_options *options) @@ -1026,6 +1045,8 @@ nir_lower_tex_block(nir_block *block, nir_builder *b, (options->lower_txd_shadow && tex->is_shadow) || (options->lower_txd_shadow_clamp && tex->is_shadow && has_min_lod) || (options->lower_txd_offset_clamp && has_offset && has_min_lod) || + (options->lower_txd_clamp_if_sampler_index_not_lt_16 && + has_min_lod && !sampler_index_lt(tex, 16)) || (options->lower_txd_cube_map && tex->sampler_dim == GLSL_SAMPLER_DIM_CUBE) || (options->lower_txd_3d && diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 786f1298f22..07e9ccc8388 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -904,7 +904,9 @@ brw_nir_apply_sampler_key(nir_shader *nir, bool is_scalar) { const struct gen_device_info *devinfo = compiler->devinfo; - nir_lower_tex_options tex_options = { 0 }; + nir_lower_tex_options tex_options = { + .lower_txd_clamp_if_sampler_index_not_lt_16 = true, + }; /* Iron Lake and prior require lowering of all rectangle textures */ if (devinfo->gen < 6)