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i965/skl: Emit depth stall workaround for gen9 as well

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The docs say that we shouldn't need this workaround for gen8+, but just
removing it, causes gpu hangs.  We'll revisit this, but for now, just
extend the workaround to gen9.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
This commit is contained in:
Damien Lespiau
2013-02-27 15:05:24 +00:00
committed by Kristian Høgsberg
parent 9404494b9b
commit 5bad948fa8
1 changed files with 1 additions and 1 deletions
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src/mesa/drivers/dri/i965/intel_batchbuffer.c
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@@ -535,7 +535,7 @@ brw_emit_pipe_control_write(struct brw_context *brw, uint32_t flags,
void
intel_emit_depth_stall_flushes(struct brw_context *brw)
{
assert(brw->gen >= 6 && brw->gen <= 8);
assert(brw->gen >= 6 && brw->gen <= 9);
brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_STALL);
brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_CACHE_FLUSH);