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intel/fs: Remove program key argument from generator.

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Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Francisco Jerez
2016-04-25 17:20:35 -07:00
committed by Jason Ekstrand
parent a14fb0184a
commit 5b6e91dd35
7 changed files with 7 additions and 10 deletions
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4
src/intel/compiler/brw_fs.cpp
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@@ -7170,7 +7170,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
*/ */
brw_compute_flat_inputs(prog_data, shader); brw_compute_flat_inputs(prog_data, shader);
fs_generator g(compiler, log_data, mem_ctx, (void *) key, &prog_data->base, fs_generator g(compiler, log_data, mem_ctx, &prog_data->base,
v8.promoted_constants, v8.runtime_check_aads_emit, v8.promoted_constants, v8.runtime_check_aads_emit,
MESA_SHADER_FRAGMENT); MESA_SHADER_FRAGMENT);
@@ -7410,7 +7410,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
if (error_str) if (error_str)
*error_str = ralloc_strdup(mem_ctx, fail_msg); *error_str = ralloc_strdup(mem_ctx, fail_msg);
} else { } else {
fs_generator g(compiler, log_data, mem_ctx, (void*) key, &prog_data->base, fs_generator g(compiler, log_data, mem_ctx, &prog_data->base,
promoted_constants, false, MESA_SHADER_COMPUTE); promoted_constants, false, MESA_SHADER_COMPUTE);
if (INTEL_DEBUG & DEBUG_CS) { if (INTEL_DEBUG & DEBUG_CS) {
char *name = ralloc_asprintf(mem_ctx, "%s compute shader %s", char *name = ralloc_asprintf(mem_ctx, "%s compute shader %s",

2
src/intel/compiler/brw_fs.h
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@@ -387,7 +387,6 @@ class fs_generator
public: public:
fs_generator(const struct brw_compiler *compiler, void *log_data, fs_generator(const struct brw_compiler *compiler, void *log_data,
void *mem_ctx, void *mem_ctx,
const void *key,
struct brw_stage_prog_data *prog_data, struct brw_stage_prog_data *prog_data,
unsigned promoted_constants, unsigned promoted_constants,
bool runtime_check_aads_emit, bool runtime_check_aads_emit,
@@ -485,7 +484,6 @@ private:
const struct gen_device_info *devinfo; const struct gen_device_info *devinfo;
struct brw_codegen *p; struct brw_codegen *p;
const void * const key;
struct brw_stage_prog_data * const prog_data; struct brw_stage_prog_data * const prog_data;
unsigned dispatch_width; /**< 8, 16 or 32 */ unsigned dispatch_width; /**< 8, 16 or 32 */

3
src/intel/compiler/brw_fs_generator.cpp
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@@ -175,14 +175,13 @@ brw_reg_from_fs_reg(const struct gen_device_info *devinfo, fs_inst *inst,
fs_generator::fs_generator(const struct brw_compiler *compiler, void *log_data, fs_generator::fs_generator(const struct brw_compiler *compiler, void *log_data,
void *mem_ctx, void *mem_ctx,
const void *key,
struct brw_stage_prog_data *prog_data, struct brw_stage_prog_data *prog_data,
unsigned promoted_constants, unsigned promoted_constants,
bool runtime_check_aads_emit, bool runtime_check_aads_emit,
gl_shader_stage stage) gl_shader_stage stage)
: compiler(compiler), log_data(log_data), : compiler(compiler), log_data(log_data),
devinfo(compiler->devinfo), key(key), devinfo(compiler->devinfo),
prog_data(prog_data), prog_data(prog_data),
promoted_constants(promoted_constants), promoted_constants(promoted_constants),
runtime_check_aads_emit(runtime_check_aads_emit), debug_flag(false), runtime_check_aads_emit(runtime_check_aads_emit), debug_flag(false),

2
src/intel/compiler/brw_shader.cpp
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@@ -1283,7 +1283,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs; prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
fs_generator g(compiler, log_data, mem_ctx, (void *) key, fs_generator g(compiler, log_data, mem_ctx,
&prog_data->base.base, v.promoted_constants, false, &prog_data->base.base, v.promoted_constants, false,
MESA_SHADER_TESS_EVAL); MESA_SHADER_TESS_EVAL);
if (unlikely(INTEL_DEBUG & DEBUG_TES)) { if (unlikely(INTEL_DEBUG & DEBUG_TES)) {

2
src/intel/compiler/brw_vec4.cpp
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@@ -2932,7 +2932,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs; prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
fs_generator g(compiler, log_data, mem_ctx, (void *) key, fs_generator g(compiler, log_data, mem_ctx,
&prog_data->base.base, v.promoted_constants, &prog_data->base.base, v.promoted_constants,
v.runtime_check_aads_emit, MESA_SHADER_VERTEX); v.runtime_check_aads_emit, MESA_SHADER_VERTEX);
if (INTEL_DEBUG & DEBUG_VS) { if (INTEL_DEBUG & DEBUG_VS) {

2
src/intel/compiler/brw_vec4_gs_visitor.cpp
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@@ -856,7 +856,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs; prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
fs_generator g(compiler, log_data, mem_ctx, &c.key, fs_generator g(compiler, log_data, mem_ctx,
&prog_data->base.base, v.promoted_constants, &prog_data->base.base, v.promoted_constants,
false, MESA_SHADER_GEOMETRY); false, MESA_SHADER_GEOMETRY);
if (unlikely(INTEL_DEBUG & DEBUG_GS)) { if (unlikely(INTEL_DEBUG & DEBUG_GS)) {

2
src/intel/compiler/brw_vec4_tcs.cpp
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@@ -474,7 +474,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs; prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
fs_generator g(compiler, log_data, mem_ctx, (void *) key, fs_generator g(compiler, log_data, mem_ctx,
&prog_data->base.base, v.promoted_constants, false, &prog_data->base.base, v.promoted_constants, false,
MESA_SHADER_TESS_CTRL); MESA_SHADER_TESS_CTRL);
if (unlikely(INTEL_DEBUG & DEBUG_TCS)) { if (unlikely(INTEL_DEBUG & DEBUG_TCS)) {