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intel/fs: Support INTEL_DEBUG=no8,no32 in compute shaders

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The "no32" flag will have precedence over "do32", like is done for FS.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
This commit is contained in:
Caio Marcelo de Oliveira Filho
2020-05-19 10:08:12 -07:00
parent 10d0f39beb
commit 5b5e77caa7
1 changed files with 17 additions and 2 deletions
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19
src/intel/compiler/brw_fs.cpp
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@@ -9063,13 +9063,16 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
min_dispatch_width = max_dispatch_width = required_dispatch_width; min_dispatch_width = max_dispatch_width = required_dispatch_width;
} }
assert(min_dispatch_width <= max_dispatch_width);
fs_visitor *v8 = NULL, *v16 = NULL, *v32 = NULL; fs_visitor *v8 = NULL, *v16 = NULL, *v32 = NULL;
fs_visitor *v = NULL; fs_visitor *v = NULL;
const char *fail_msg = NULL; const char *fail_msg = NULL;
/* Now the main event: Visit the shader IR and generate our CS IR for it. /* Now the main event: Visit the shader IR and generate our CS IR for it.
*/ */
if (min_dispatch_width <= 8 && max_dispatch_width >= 8) { if (likely(!(INTEL_DEBUG & DEBUG_NO8)) &&
min_dispatch_width <= 8 && max_dispatch_width >= 8) {
nir_shader *nir8 = compile_cs_to_nir(compiler, mem_ctx, key, nir_shader *nir8 = compile_cs_to_nir(compiler, mem_ctx, key,
src_shader, 8); src_shader, 8);
v8 = new fs_visitor(compiler, log_data, mem_ctx, &key->base, v8 = new fs_visitor(compiler, log_data, mem_ctx, &key->base,
@@ -9118,7 +9121,8 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
} }
} }
if ((!v || !v->spilled_any_registers) && if (likely(!(INTEL_DEBUG & DEBUG_NO32)) &&
(!v || !v->spilled_any_registers) &&
!fail_msg && (min_dispatch_width > 16 || (INTEL_DEBUG & DEBUG_DO32)) && !fail_msg && (min_dispatch_width > 16 || (INTEL_DEBUG & DEBUG_DO32)) &&
max_dispatch_width >= 32) { max_dispatch_width >= 32) {
/* Try a SIMD32 compile */ /* Try a SIMD32 compile */
@@ -9148,6 +9152,17 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
} }
} }
if (unlikely(!v && (INTEL_DEBUG & (DEBUG_NO8 | DEBUG_NO16 | DEBUG_NO32)))) {
if (error_str) {
*error_str =
ralloc_strdup(mem_ctx,
"Cannot satisfy INTEL_DEBUG flags SIMD restrictions");
}
return NULL;
}
assert(v);
const unsigned *ret = NULL; const unsigned *ret = NULL;
if (unlikely(v == NULL)) { if (unlikely(v == NULL)) {
assert(fail_msg); assert(fail_msg);