iris: Move away from "hw" for some context terminology
Kernel contexts can take two forms now. In the older case a kernel context will have a single hardware context. With an "engines" based context, the context can now have 1 or more hardware contexts. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>
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@@ -241,10 +241,10 @@ iris_init_non_engine_contexts(struct iris_context *ice, int priority)
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for (int i = 0; i < IRIS_BATCH_COUNT; i++) {
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for (int i = 0; i < IRIS_BATCH_COUNT; i++) {
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struct iris_batch *batch = &ice->batches[i];
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struct iris_batch *batch = &ice->batches[i];
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batch->hw_ctx_id = iris_create_hw_context(screen->bufmgr);
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batch->ctx_id = iris_create_hw_context(screen->bufmgr);
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batch->exec_flags = I915_EXEC_RENDER;
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batch->exec_flags = I915_EXEC_RENDER;
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assert(batch->hw_ctx_id);
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assert(batch->ctx_id);
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iris_hw_context_set_priority(screen->bufmgr, batch->hw_ctx_id, priority);
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iris_hw_context_set_priority(screen->bufmgr, batch->ctx_id, priority);
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}
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}
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}
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}
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@@ -488,7 +488,7 @@ iris_batch_free(struct iris_batch *batch)
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batch->map = NULL;
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batch->map = NULL;
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batch->map_next = NULL;
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batch->map_next = NULL;
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iris_destroy_hw_context(bufmgr, batch->hw_ctx_id);
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iris_destroy_kernel_context(bufmgr, batch->ctx_id);
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iris_destroy_batch_measure(batch->measure);
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iris_destroy_batch_measure(batch->measure);
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batch->measure = NULL;
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batch->measure = NULL;
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@@ -614,12 +614,12 @@ replace_hw_ctx(struct iris_batch *batch)
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struct iris_screen *screen = batch->screen;
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struct iris_screen *screen = batch->screen;
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struct iris_bufmgr *bufmgr = screen->bufmgr;
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struct iris_bufmgr *bufmgr = screen->bufmgr;
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uint32_t new_ctx = iris_clone_hw_context(bufmgr, batch->hw_ctx_id);
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uint32_t new_ctx = iris_clone_hw_context(bufmgr, batch->ctx_id);
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if (!new_ctx)
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if (!new_ctx)
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return false;
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return false;
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iris_destroy_hw_context(bufmgr, batch->hw_ctx_id);
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iris_destroy_kernel_context(bufmgr, batch->ctx_id);
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batch->hw_ctx_id = new_ctx;
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batch->ctx_id = new_ctx;
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/* Notify the context that state must be re-initialized. */
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/* Notify the context that state must be re-initialized. */
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iris_lost_context_state(batch);
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iris_lost_context_state(batch);
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@@ -632,7 +632,7 @@ iris_batch_check_for_reset(struct iris_batch *batch)
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{
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{
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struct iris_screen *screen = batch->screen;
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struct iris_screen *screen = batch->screen;
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enum pipe_reset_status status = PIPE_NO_RESET;
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enum pipe_reset_status status = PIPE_NO_RESET;
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struct drm_i915_reset_stats stats = { .ctx_id = batch->hw_ctx_id };
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struct drm_i915_reset_stats stats = { .ctx_id = batch->ctx_id };
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if (intel_ioctl(screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats))
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if (intel_ioctl(screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats))
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DBG("DRM_IOCTL_I915_GET_RESET_STATS failed: %s\n", strerror(errno));
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DBG("DRM_IOCTL_I915_GET_RESET_STATS failed: %s\n", strerror(errno));
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@@ -847,7 +847,7 @@ submit_batch(struct iris_batch *batch)
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I915_EXEC_NO_RELOC |
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I915_EXEC_NO_RELOC |
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I915_EXEC_BATCH_FIRST |
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I915_EXEC_BATCH_FIRST |
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I915_EXEC_HANDLE_LUT,
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I915_EXEC_HANDLE_LUT,
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.rsvd1 = batch->hw_ctx_id, /* rsvd1 is actually the context ID */
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.rsvd1 = batch->ctx_id, /* rsvd1 is actually the context ID */
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};
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};
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if (num_fences(batch)) {
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if (num_fences(batch)) {
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@@ -914,7 +914,7 @@ _iris_batch_flush(struct iris_batch *batch, const char *file, int line)
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fprintf(stderr, "%19s:%-3d: %s batch [%u] flush with %5db (%0.1f%%) "
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fprintf(stderr, "%19s:%-3d: %s batch [%u] flush with %5db (%0.1f%%) "
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"(cmds), %4d BOs (%0.1fMb aperture)\n",
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"(cmds), %4d BOs (%0.1fMb aperture)\n",
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file, line, batch_name_to_string(batch->name), batch->hw_ctx_id,
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file, line, batch_name_to_string(batch->name), batch->ctx_id,
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batch->total_chained_batch_size,
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batch->total_chained_batch_size,
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100.0f * batch->total_chained_batch_size / BATCH_SZ,
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100.0f * batch->total_chained_batch_size / BATCH_SZ,
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batch->exec_count,
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batch->exec_count,
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@@ -79,7 +79,7 @@ struct iris_batch {
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/** Last Surface State Base Address set in this hardware context. */
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/** Last Surface State Base Address set in this hardware context. */
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uint64_t last_surface_base_address;
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uint64_t last_surface_base_address;
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uint32_t hw_ctx_id;
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uint32_t ctx_id;
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uint32_t exec_flags;
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uint32_t exec_flags;
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/** A list of all BOs referenced by this batch */
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/** A list of all BOs referenced by this batch */
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@@ -2101,7 +2101,7 @@ iris_clone_hw_context(struct iris_bufmgr *bufmgr, uint32_t ctx_id)
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}
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}
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void
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void
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iris_destroy_hw_context(struct iris_bufmgr *bufmgr, uint32_t ctx_id)
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iris_destroy_kernel_context(struct iris_bufmgr *bufmgr, uint32_t ctx_id)
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{
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{
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struct drm_i915_gem_context_destroy d = { .ctx_id = ctx_id };
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struct drm_i915_gem_context_destroy d = { .ctx_id = ctx_id };
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@@ -460,7 +460,7 @@ void iris_hw_context_set_unrecoverable(struct iris_bufmgr *bufmgr,
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int iris_hw_context_set_priority(struct iris_bufmgr *bufmgr,
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int iris_hw_context_set_priority(struct iris_bufmgr *bufmgr,
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uint32_t ctx_id, int priority);
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uint32_t ctx_id, int priority);
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void iris_destroy_hw_context(struct iris_bufmgr *bufmgr, uint32_t ctx_id);
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void iris_destroy_kernel_context(struct iris_bufmgr *bufmgr, uint32_t ctx_id);
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int iris_gem_get_tiling(struct iris_bo *bo, uint32_t *tiling);
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int iris_gem_get_tiling(struct iris_bo *bo, uint32_t *tiling);
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int iris_gem_set_tiling(struct iris_bo *bo, const struct isl_surf *surf);
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int iris_gem_set_tiling(struct iris_bo *bo, const struct isl_surf *surf);
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@@ -157,7 +157,7 @@ iris_init_monitor_ctx(struct iris_context *ice)
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ice,
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ice,
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screen->bufmgr,
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screen->bufmgr,
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&screen->devinfo,
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&screen->devinfo,
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ice->batches[IRIS_BATCH_RENDER].hw_ctx_id,
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ice->batches[IRIS_BATCH_RENDER].ctx_id,
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screen->fd);
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screen->fd);
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}
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}
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@@ -76,7 +76,7 @@ iris_init_perf_query_info(struct pipe_context *pipe)
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ice,
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ice,
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screen->bufmgr,
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screen->bufmgr,
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&screen->devinfo,
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&screen->devinfo,
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ice->batches[IRIS_BATCH_RENDER].hw_ctx_id,
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ice->batches[IRIS_BATCH_RENDER].ctx_id,
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screen->fd);
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screen->fd);
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return perf_cfg->n_queries;
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return perf_cfg->n_queries;
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