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nir/spirv: fix chain access with different index bit sizes

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Currently we support 32-bit indexes/offsets all over the driver, so we
convert them to that bit size.

Fixes dEQP-VK.spirv_assembly.instruction.*.indexing.*

v2: Use u2u32 instead (Jason).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Samuel Iglesias Gonsálvez
2017-08-29 06:56:26 +02:00
parent 8d6b97a815
commit 5b1b088f2a
1 changed files with 8 additions and 3 deletions
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11
src/compiler/spirv/vtn_variables.c
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@@ -102,10 +102,15 @@ vtn_access_link_as_ssa(struct vtn_builder *b, struct vtn_access_link link,
if (link.mode == vtn_access_mode_literal) { if (link.mode == vtn_access_mode_literal) {
return nir_imm_int(&b->nb, link.id * stride); return nir_imm_int(&b->nb, link.id * stride);
} else if (stride == 1) { } else if (stride == 1) {
return vtn_ssa_value(b, link.id)->def; nir_ssa_def *ssa = vtn_ssa_value(b, link.id)->def;
if (ssa->bit_size != 32)
ssa = nir_u2u32(&b->nb, ssa);
return ssa;
} else { } else {
return nir_imul(&b->nb, vtn_ssa_value(b, link.id)->def, nir_ssa_def *src0 = vtn_ssa_value(b, link.id)->def;
nir_imm_int(&b->nb, stride)); if (src0->bit_size != 32)
src0 = nir_u2u32(&b->nb, src0);
return nir_imul(&b->nb, src0, nir_imm_int(&b->nb, stride));
} }
} }