broadcom/vc5: Add compiler support for V3D 4.x texturing.
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@@ -33,6 +33,7 @@
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#include "util/macros.h"
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#include "common/v3d_debug.h"
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#include "common/v3d_device_info.h"
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#include "compiler/nir/nir.h"
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#include "util/list.h"
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#include "util/u_math.h"
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@@ -172,7 +173,7 @@ enum quniform_contents {
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QUNIFORM_USER_CLIP_PLANE,
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/**
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* A reference to a texture config parameter 0 uniform.
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* A reference to a V3D 3.x texture config parameter 0 uniform.
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*
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* This is a uniform implicitly loaded with a QPU_W_TMU* write, which
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* defines texture type, miplevels, and such. It will be found as a
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@@ -213,7 +214,7 @@ enum quniform_contents {
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QUNIFORM_TEXTURE_CONFIG_P0_32,
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/**
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* A reference to a texture config parameter 1 uniform.
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* A reference to a V3D 3.x texture config parameter 1 uniform.
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*
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* This is a uniform implicitly loaded with a QPU_W_TMU* write, which
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* has the pointer to the indirect texture state. Our data[] field
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@@ -222,6 +223,13 @@ enum quniform_contents {
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*/
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QUNIFORM_TEXTURE_CONFIG_P1,
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/* A a V3D 4.x texture config parameter. The high 8 bits will be
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* which texture or sampler is being sampled, and the driver must
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* replace the address field with the appropriate address.
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*/
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QUNIFORM_TMU_CONFIG_P0,
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QUNIFORM_TMU_CONFIG_P1,
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QUNIFORM_TEXTURE_FIRST_LEVEL,
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QUNIFORM_TEXTURE_WIDTH,
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@@ -691,6 +699,7 @@ void vir_lower_uniforms(struct v3d_compile *c);
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void v3d33_vir_vpm_read_setup(struct v3d_compile *c, int num_components);
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void v3d33_vir_vpm_write_setup(struct v3d_compile *c);
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void v3d33_vir_emit_tex(struct v3d_compile *c, nir_tex_instr *instr);
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void v3d40_vir_emit_tex(struct v3d_compile *c, nir_tex_instr *instr);
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void v3d_vir_to_qpu(struct v3d_compile *c, struct qpu_reg *temp_registers);
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uint32_t v3d_qpu_schedule_instructions(struct v3d_compile *c);
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@@ -896,8 +905,16 @@ vir_NOP(struct v3d_compile *c)
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static inline struct qreg
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vir_LDTMU(struct v3d_compile *c)
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{
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vir_NOP(c)->qpu.sig.ldtmu = true;
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return vir_MOV(c, vir_reg(QFILE_MAGIC, V3D_QPU_WADDR_R4));
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if (c->devinfo->ver >= 41) {
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struct qinst *ldtmu = vir_add_inst(V3D_QPU_A_NOP, c->undef,
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c->undef, c->undef);
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ldtmu->qpu.sig.ldtmu = true;
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return vir_emit_def(c, ldtmu);
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} else {
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vir_NOP(c)->qpu.sig.ldtmu = true;
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return vir_MOV(c, vir_reg(QFILE_MAGIC, V3D_QPU_WADDR_R4));
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}
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}
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/*
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