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anv: fix non matching image/view format attachment resolve

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Let's say you have an image in R32_UINT format, a view is created in
R32_SFLOAT and used as color attachment.

When resolving the attachment, our current code uses the image format
(R32_UINT in this case). But resolve mode might apply only to SFLOAT,
so we currently run into an assert in blorp.

We should instead use the view format. There is an exception for
depth/stencil view because the format we want to resolve is actually
the depth/stencil format, not just the depth or stencil aspect.

This fixes vkd3d-proton's test_multisample_resolve_formats.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27875>
This commit is contained in:
Lionel Landwerlin
2024-02-29 10:45:46 +02:00
committed by Marge Bot
parent 2106092e63
commit 5a7e58a430
3 changed files with 109 additions and 106 deletions
Download Patch File Download Diff File Expand all files Collapse all files

102
src/intel/vulkan/anv_blorp.c
View File

@@ -2111,12 +2111,14 @@ void anv_CmdClearAttachments(
anv_blorp_batch_finish(&batch);
}
void
static void
anv_image_msaa_resolve(struct anv_cmd_buffer *cmd_buffer,
const struct anv_image *src_image,
enum isl_format src_format_override,
enum isl_aux_usage src_aux_usage,
uint32_t src_level, uint32_t src_base_layer,
const struct anv_image *dst_image,
enum isl_format dst_format_override,
enum isl_aux_usage dst_aux_usage,
uint32_t dst_level, uint32_t dst_base_layer,
VkImageAspectFlagBits aspect,
@@ -2169,9 +2171,9 @@ anv_image_msaa_resolve(struct anv_cmd_buffer *cmd_buffer,
for (uint32_t l = 0; l < layer_count; l++) {
blorp_blit(&batch,
&src_surf, src_level, src_base_layer + l,
ISL_FORMAT_UNSUPPORTED, ISL_SWIZZLE_IDENTITY,
src_format_override, ISL_SWIZZLE_IDENTITY,
&dst_surf, dst_level, dst_base_layer + l,
ISL_FORMAT_UNSUPPORTED, ISL_SWIZZLE_IDENTITY,
dst_format_override, ISL_SWIZZLE_IDENTITY,
src_x, src_y, src_x + width, src_y + height,
dst_x, dst_y, dst_x + width, dst_y + height,
filter, false, false);
@@ -2180,6 +2182,96 @@ anv_image_msaa_resolve(struct anv_cmd_buffer *cmd_buffer,
anv_blorp_batch_finish(&batch);
}
static enum blorp_filter
vk_to_blorp_resolve_mode(VkResolveModeFlagBits vk_mode)
{
switch (vk_mode) {
case VK_RESOLVE_MODE_SAMPLE_ZERO_BIT:
return BLORP_FILTER_SAMPLE_0;
case VK_RESOLVE_MODE_AVERAGE_BIT:
return BLORP_FILTER_AVERAGE;
case VK_RESOLVE_MODE_MIN_BIT:
return BLORP_FILTER_MIN_SAMPLE;
case VK_RESOLVE_MODE_MAX_BIT:
return BLORP_FILTER_MAX_SAMPLE;
default:
return BLORP_FILTER_NONE;
}
}
void
anv_attachment_msaa_resolve(struct anv_cmd_buffer *cmd_buffer,
const struct anv_attachment *att,
VkImageLayout layout,
VkImageAspectFlagBits aspect)
{
struct anv_cmd_graphics_state *gfx = &cmd_buffer->state.gfx;
const struct anv_image_view *src_iview = att->iview;
const struct anv_image_view *dst_iview = att->resolve_iview;
enum isl_aux_usage src_aux_usage =
anv_layout_to_aux_usage(cmd_buffer->device->info,
src_iview->image, aspect,
VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
layout,
cmd_buffer->queue_family->queueFlags);
enum isl_aux_usage dst_aux_usage =
anv_layout_to_aux_usage(cmd_buffer->device->info,
dst_iview->image, aspect,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
att->resolve_layout,
cmd_buffer->queue_family->queueFlags);
enum blorp_filter filter = vk_to_blorp_resolve_mode(att->resolve_mode);
/* Depth/stencil should not use their view format for resolve because they
* go in pairs.
*/
enum isl_format src_format = ISL_FORMAT_UNSUPPORTED;
enum isl_format dst_format = ISL_FORMAT_UNSUPPORTED;
if (!(aspect & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT))) {
src_format = src_iview->planes[0].isl.format;
dst_format = dst_iview->planes[0].isl.format;
}
const VkRect2D render_area = gfx->render_area;
if (gfx->view_mask == 0) {
anv_image_msaa_resolve(cmd_buffer,
src_iview->image, src_format, src_aux_usage,
src_iview->planes[0].isl.base_level,
src_iview->planes[0].isl.base_array_layer,
dst_iview->image, dst_format, dst_aux_usage,
dst_iview->planes[0].isl.base_level,
dst_iview->planes[0].isl.base_array_layer,
aspect,
render_area.offset.x, render_area.offset.y,
render_area.offset.x, render_area.offset.y,
render_area.extent.width,
render_area.extent.height,
gfx->layer_count, filter);
} else {
uint32_t res_view_mask = gfx->view_mask;
while (res_view_mask) {
int i = u_bit_scan(&res_view_mask);
anv_image_msaa_resolve(cmd_buffer,
src_iview->image, src_format, src_aux_usage,
src_iview->planes[0].isl.base_level,
src_iview->planes[0].isl.base_array_layer + i,
dst_iview->image, dst_format, dst_aux_usage,
dst_iview->planes[0].isl.base_level,
dst_iview->planes[0].isl.base_array_layer + i,
aspect,
render_area.offset.x, render_area.offset.y,
render_area.offset.x, render_area.offset.y,
render_area.extent.width,
render_area.extent.height,
1, filter);
}
}
}
static void
resolve_image(struct anv_cmd_buffer *cmd_buffer,
struct anv_image *src_image,
@@ -2211,10 +2303,10 @@ resolve_image(struct anv_cmd_buffer *cmd_buffer,
cmd_buffer->queue_family->queueFlags);
anv_image_msaa_resolve(cmd_buffer,
src_image, src_aux_usage,
src_image, ISL_FORMAT_UNSUPPORTED, src_aux_usage,
region->srcSubresource.mipLevel,
region->srcSubresource.baseArrayLayer,
dst_image, dst_aux_usage,
dst_image, ISL_FORMAT_UNSUPPORTED, dst_aux_usage,
region->dstSubresource.mipLevel,
region->dstSubresource.baseArrayLayer,
(1 << aspect_bit),

17
src/intel/vulkan/anv_private.h
View File

@@ -5392,19 +5392,10 @@ anv_image_clear_depth_stencil(struct anv_cmd_buffer *cmd_buffer,
VkRect2D area,
float depth_value, uint8_t stencil_value);
void
anv_image_msaa_resolve(struct anv_cmd_buffer *cmd_buffer,
const struct anv_image *src_image,
enum isl_aux_usage src_aux_usage,
uint32_t src_level, uint32_t src_base_layer,
const struct anv_image *dst_image,
enum isl_aux_usage dst_aux_usage,
uint32_t dst_level, uint32_t dst_base_layer,
VkImageAspectFlagBits aspect,
uint32_t src_x, uint32_t src_y,
uint32_t dst_x, uint32_t dst_y,
uint32_t width, uint32_t height,
uint32_t layer_count,
enum blorp_filter filter);
anv_attachment_msaa_resolve(struct anv_cmd_buffer *cmd_buffer,
const struct anv_attachment *att,
VkImageLayout layout,
VkImageAspectFlagBits aspect);
void
anv_image_hiz_op(struct anv_cmd_buffer *cmd_buffer,
const struct anv_image *image,

96
src/intel/vulkan/genX_cmd_buffer.c
View File

@@ -5202,86 +5202,6 @@ cmd_buffer_mark_attachment_written(struct anv_cmd_buffer *cmd_buffer,
}
}
static enum blorp_filter
vk_to_blorp_resolve_mode(VkResolveModeFlagBits vk_mode)
{
switch (vk_mode) {
case VK_RESOLVE_MODE_SAMPLE_ZERO_BIT:
return BLORP_FILTER_SAMPLE_0;
case VK_RESOLVE_MODE_AVERAGE_BIT:
return BLORP_FILTER_AVERAGE;
case VK_RESOLVE_MODE_MIN_BIT:
return BLORP_FILTER_MIN_SAMPLE;
case VK_RESOLVE_MODE_MAX_BIT:
return BLORP_FILTER_MAX_SAMPLE;
default:
return BLORP_FILTER_NONE;
}
}
static void
cmd_buffer_resolve_msaa_attachment(struct anv_cmd_buffer *cmd_buffer,
const struct anv_attachment *att,
VkImageLayout layout,
VkImageAspectFlagBits aspect)
{
struct anv_cmd_graphics_state *gfx = &cmd_buffer->state.gfx;
const struct anv_image_view *src_iview = att->iview;
const struct anv_image_view *dst_iview = att->resolve_iview;
enum isl_aux_usage src_aux_usage =
anv_layout_to_aux_usage(cmd_buffer->device->info,
src_iview->image, aspect,
VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
layout,
cmd_buffer->queue_family->queueFlags);
enum isl_aux_usage dst_aux_usage =
anv_layout_to_aux_usage(cmd_buffer->device->info,
dst_iview->image, aspect,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
att->resolve_layout,
cmd_buffer->queue_family->queueFlags);
enum blorp_filter filter = vk_to_blorp_resolve_mode(att->resolve_mode);
const VkRect2D render_area = gfx->render_area;
if (gfx->view_mask == 0) {
anv_image_msaa_resolve(cmd_buffer,
src_iview->image, src_aux_usage,
src_iview->planes[0].isl.base_level,
src_iview->planes[0].isl.base_array_layer,
dst_iview->image, dst_aux_usage,
dst_iview->planes[0].isl.base_level,
dst_iview->planes[0].isl.base_array_layer,
aspect,
render_area.offset.x, render_area.offset.y,
render_area.offset.x, render_area.offset.y,
render_area.extent.width,
render_area.extent.height,
gfx->layer_count, filter);
} else {
uint32_t res_view_mask = gfx->view_mask;
while (res_view_mask) {
int i = u_bit_scan(&res_view_mask);
anv_image_msaa_resolve(cmd_buffer,
src_iview->image, src_aux_usage,
src_iview->planes[0].isl.base_level,
src_iview->planes[0].isl.base_array_layer + i,
dst_iview->image, dst_aux_usage,
dst_iview->planes[0].isl.base_level,
dst_iview->planes[0].isl.base_array_layer + i,
aspect,
render_area.offset.x, render_area.offset.y,
render_area.offset.x, render_area.offset.y,
render_area.extent.width,
render_area.extent.height,
1, filter);
}
}
}
void genX(CmdEndRendering)(
VkCommandBuffer commandBuffer)
{
@@ -5342,8 +5262,8 @@ void genX(CmdEndRendering)(
(gfx->rendering_flags & VK_RENDERING_SUSPENDING_BIT))
continue;
cmd_buffer_resolve_msaa_attachment(cmd_buffer, att, att->layout,
VK_IMAGE_ASPECT_COLOR_BIT);
anv_attachment_msaa_resolve(cmd_buffer, att, att->layout,
VK_IMAGE_ASPECT_COLOR_BIT);
}
if (gfx->depth_att.resolve_mode != VK_RESOLVE_MODE_NONE &&
@@ -5361,9 +5281,9 @@ void genX(CmdEndRendering)(
VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL,
false /* will_full_fast_clear */);
cmd_buffer_resolve_msaa_attachment(cmd_buffer, &gfx->depth_att,
VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL,
VK_IMAGE_ASPECT_DEPTH_BIT);
anv_attachment_msaa_resolve(cmd_buffer, &gfx->depth_att,
VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL,
VK_IMAGE_ASPECT_DEPTH_BIT);
/* Transition the source back to the original layout. This seems a bit
* inefficient but, since HiZ resolves aren't destructive, going from
@@ -5379,9 +5299,9 @@ void genX(CmdEndRendering)(
if (gfx->stencil_att.resolve_mode != VK_RESOLVE_MODE_NONE &&
!(gfx->rendering_flags & VK_RENDERING_SUSPENDING_BIT)) {
cmd_buffer_resolve_msaa_attachment(cmd_buffer, &gfx->stencil_att,
gfx->stencil_att.layout,
VK_IMAGE_ASPECT_STENCIL_BIT);
anv_attachment_msaa_resolve(cmd_buffer, &gfx->stencil_att,
gfx->stencil_att.layout,
VK_IMAGE_ASPECT_STENCIL_BIT);
}