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Revert "radeon: add EFC support to only VCN2.0 devices"

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This reverts commit 23e5b910c5.

Reason for revert:
It's causing the regression for H264 transcoding. We will Enable EFC
once we verify all corner cases and as of now disabling

Signed-off-by: Ikshwaku Chauhan <ikshwaku.chauhan@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17869>
(cherry picked from commit ddc8ab9e43)
This commit is contained in:
Ikshwaku Chauhan
2022-08-03 10:42:09 +05:30
committed by Dylan Baker
parent 613e43c87b
commit 5a267b1cf9
8 changed files with 44 additions and 40374 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
.pick_status.json
View File

@@ -301,7 +301,7 @@
"description": "Revert \"radeon: add EFC support to only VCN2.0 devices\"",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "23e5b910c57158030ba246530c57ab13a51245f3"
},

1
src/gallium/drivers/radeonsi/meson.build
View File

@@ -73,7 +73,6 @@ files_libradeonsi = files(
'si_texture.c',
'si_uvd.c',
'pspdecryptionparam.h',
'radeon_efc.h',
'radeon_temporal.h',
'radeon_uvd.c',
'radeon_uvd.h',

40150
src/gallium/drivers/radeonsi/radeon_efc.h
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File diff suppressed because it is too large Load Diff

91
src/gallium/drivers/radeonsi/radeon_vcn_enc.c
View File

@@ -222,80 +222,6 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_NONE;
}
}
if (picture->output_format == PIPE_FORMAT_NONE)
picture->output_format = PIPE_FORMAT_NV12;
if (picture->input_format != picture->output_format) {
switch (picture->input_format) {
case PIPE_FORMAT_P010:
enc->enc_pic.input_format.input_color_volume = 0;
enc->enc_pic.input_format.input_color_range = 0;
enc->enc_pic.input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_2_0;
enc->enc_pic.input_format.input_chroma_location = 0;
enc->enc_pic.input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_10_BIT;
enc->enc_pic.input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_P010;
break;
case PIPE_FORMAT_NV12:
enc->enc_pic.input_format.input_color_volume = 0;
enc->enc_pic.input_format.input_color_range = 0;
enc->enc_pic.input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_2_0;
enc->enc_pic.input_format.input_chroma_location = 0;
enc->enc_pic.input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
enc->enc_pic.input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_NV12;
break;
case PIPE_FORMAT_B8G8R8X8_UNORM: // RGB
case PIPE_FORMAT_B8G8R8A8_UNORM:
enc->enc_pic.input_format.input_color_volume = 0;
enc->enc_pic.input_format.input_color_range = 0;
enc->enc_pic.input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_4_4;
enc->enc_pic.input_format.input_chroma_location = 0;
enc->enc_pic.input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
enc->enc_pic.input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_A8R8G8B8;
break;
case PIPE_FORMAT_R8G8B8X8_UNORM:
case PIPE_FORMAT_R8G8B8A8_UNORM:
enc->enc_pic.input_format.input_color_volume = 0;
enc->enc_pic.input_format.input_color_range = 0;
enc->enc_pic.input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_4_4;
enc->enc_pic.input_format.input_chroma_location = 0;
enc->enc_pic.input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
enc->enc_pic.input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_A8B8G8R8;
break;
default:
break;
}
switch(enc->enc_pic.input_format.input_color_packing_format) {
case RENCODE_COLOR_PACKING_FORMAT_NV12:
case RENCODE_COLOR_PACKING_FORMAT_P010:
enc->enc_pic.input_format.input_color_space = RENCODE_COLOR_SPACE_YUV;
break;
case RENCODE_COLOR_PACKING_FORMAT_A8R8G8B8:
case RENCODE_COLOR_PACKING_FORMAT_A8B8G8R8:
enc->enc_pic.input_format.input_color_space = RENCODE_COLOR_SPACE_RGB;
break;
default:
break;
}
switch (picture->output_format) {
case PIPE_FORMAT_P010:
enc->enc_pic.output_format.output_color_volume = 0;
enc->enc_pic.output_format.output_color_range = 0;
enc->enc_pic.output_format.output_chroma_location = 0;
enc->enc_pic.output_format.output_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_10_BIT;
break;
case PIPE_FORMAT_NV12:
enc->enc_pic.output_format.output_color_volume = 0;
enc->enc_pic.output_format.output_color_range = 0;
enc->enc_pic.output_format.output_chroma_location = 0;
enc->enc_pic.output_format.output_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
break;
default:
break;
}
}
}
static void flush(struct radeon_encoder *enc)
@@ -386,16 +312,8 @@ static void radeon_enc_begin_frame(struct pipe_video_codec *encoder,
radeon_vcn_enc_get_param(enc, picture);
if (source->buffer_format == PIPE_FORMAT_NV12 ||
source->buffer_format == PIPE_FORMAT_P010 ||
source->buffer_format == PIPE_FORMAT_P016) {
enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
}
else {
enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
enc->chroma = NULL;
}
enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
enc->need_feedback = false;
@@ -461,11 +379,6 @@ static void radeon_enc_destroy(struct pipe_video_codec *encoder)
si_vid_destroy_buffer(&fb);
}
if (enc->efc) {
si_vid_destroy_buffer(enc->efc);
FREE(enc->efc);
enc->efc = NULL;
}
si_vid_destroy_buffer(&enc->cpb);
enc->ws->cs_destroy(&enc->cs);
FREE(enc);

59
src/gallium/drivers/radeonsi/radeon_vcn_enc.h
View File

@@ -128,29 +128,6 @@
#define RENCODE_MAX_NUM_TEMPORAL_LAYERS 4
typedef enum {
RENCODE_COLOR_SPACE_YUV,
RENCODE_COLOR_SPACE_RGB
} RENCODE_COLOR_SPACE;
typedef enum {
RENCODE_CHROMA_SUBSAMPLING_4_2_0,
RENCODE_CHROMA_SUBSAMPLING_4_4_4
} RENCODE_CHROMA_SUBSAMPLING;
typedef enum {
RENCODE_COLOR_BIT_DEPTH_8_BIT,
RENCODE_COLOR_BIT_DEPTH_10_BIT
} RENCODE_COLOR_BIT_DEPTH;
typedef enum {
RENCODE_COLOR_PACKING_FORMAT_NV12,
RENCODE_COLOR_PACKING_FORMAT_P010,
RENCODE_COLOR_PACKING_FORMAT_A8R8G8B8 = 4,
RENCODE_COLOR_PACKING_FORMAT_A8B8G8R8 = 7,
} RENCODE_COLOR_PACKING_FORMAT;
#define RADEON_ENC_CS(value) (enc->cs.current.buf[enc->cs.current.cdw++] = (value))
#define RADEON_ENC_BEGIN(cmd) \
{ \
@@ -399,7 +376,7 @@ typedef struct rvcn_enc_encode_context_buffer_s {
uint32_t pre_encode_picture_chroma_pitch;
rvcn_enc_reconstructed_picture_t
pre_encode_reconstructed_pictures[RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES];
rvcn_enc_pre_encode_input_picture_t pre_encode_input_picture;
rvcn_enc_reconstructed_picture_t pre_encode_input_picture;
uint32_t two_pass_search_center_map_offset;
uint32_t colloc_buffer_offset;
} rvcn_enc_encode_context_buffer_t;
@@ -447,37 +424,8 @@ typedef struct rvcn_enc_cmd_s {
uint32_t deblocking_filter_h264;
uint32_t input_format;
uint32_t output_format;
uint32_t efc_params;
} rvcn_enc_cmd_t;
typedef struct rvcn_enc_efc_config_s
{
uint32_t coef_buffer_address_hi;
uint32_t coef_buffer_address_lo;
uint32_t coef_buffer_size;
uint32_t cm_program_register_data_size;
} rvcn_enc_efc_config_t;
typedef struct rvcn_enc_input_format_s
{
uint32_t input_color_volume;
RENCODE_COLOR_SPACE input_color_space;
uint32_t input_color_range;
RENCODE_CHROMA_SUBSAMPLING input_chroma_subsampling;
uint32_t input_chroma_location;
RENCODE_COLOR_BIT_DEPTH input_color_bit_depth;
RENCODE_COLOR_PACKING_FORMAT input_color_packing_format;
} rvcn_enc_input_format_t;
typedef struct rvcn_enc_output_format_s
{
uint32_t output_color_volume;
uint32_t output_color_range;
uint32_t output_chroma_location;
RENCODE_COLOR_BIT_DEPTH output_color_bit_depth;
} rvcn_enc_output_format_t;
typedef void (*radeon_enc_get_buffer)(struct pipe_resource *resource, struct pb_buffer **handle,
struct radeon_surf **surface);
@@ -548,9 +496,6 @@ struct radeon_enc_pic {
rvcn_enc_feedback_buffer_t fb_buf;
rvcn_enc_intra_refresh_t intra_ref;
rvcn_enc_encode_params_t enc_params;
rvcn_enc_efc_config_t efc_params;
rvcn_enc_input_format_t input_format;
rvcn_enc_output_format_t output_format;
};
struct radeon_encoder {
@@ -594,7 +539,6 @@ struct radeon_encoder {
void (*encode_headers)(struct radeon_encoder *enc);
void (*input_format)(struct radeon_encoder *enc);
void (*output_format)(struct radeon_encoder *enc);
void (*efc_params)(struct radeon_encoder *enc);
/* mq is used for preversing multiple queue ibs */
void (*mq_begin)(struct radeon_encoder *enc);
void (*mq_encode)(struct radeon_encoder *enc);
@@ -638,7 +582,6 @@ struct radeon_encoder {
bool need_feedback;
unsigned dpb_size;
rvcn_enc_picture_info_t dpb[RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES];
struct rvid_buffer *efc;
};
void radeon_enc_add_buffer(struct radeon_encoder *enc, struct pb_buffer *buf,

4
src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c
View File

@@ -1161,14 +1161,14 @@ static void radeon_enc_encode_params(struct radeon_encoder *enc)
enc->enc_pic.enc_params.allowed_max_bitstream_size = enc->bs_size;
enc->enc_pic.enc_params.input_pic_luma_pitch = enc->luma->u.gfx9.surf_pitch;
enc->enc_pic.enc_params.input_pic_chroma_pitch = enc->chroma ? enc->chroma->u.gfx9.surf_pitch : 0;
enc->enc_pic.enc_params.input_pic_chroma_pitch = enc->chroma->u.gfx9.surf_pitch;
enc->enc_pic.enc_params.input_pic_swizzle_mode = enc->luma->u.gfx9.swizzle_mode;
RADEON_ENC_BEGIN(enc->cmd.enc_params);
RADEON_ENC_CS(enc->enc_pic.enc_params.pic_type);
RADEON_ENC_CS(enc->enc_pic.enc_params.allowed_max_bitstream_size);
RADEON_ENC_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->luma->u.gfx9.surf_offset);
RADEON_ENC_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->chroma ? enc->chroma->u.gfx9.surf_offset : 0);
RADEON_ENC_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->chroma->u.gfx9.surf_offset);
RADEON_ENC_CS(enc->enc_pic.enc_params.input_pic_luma_pitch);
RADEON_ENC_CS(enc->enc_pic.enc_params.input_pic_chroma_pitch);
RADEON_ENC_CS(enc->enc_pic.enc_params.input_pic_swizzle_mode);

107
src/gallium/drivers/radeonsi/radeon_vcn_enc_2_0.c
View File

@@ -30,8 +30,6 @@
#include "radeon_video.h"
#include "si_pipe.h"
#include "util/u_video.h"
#include "util/u_memory.h"
#include "radeon_efc.h"
#include <stdio.h>
@@ -56,7 +54,6 @@
#define RENCODE_IB_PARAM_ENCODE_CONTEXT_BUFFER 0x00000011
#define RENCODE_IB_PARAM_VIDEO_BITSTREAM_BUFFER 0x00000012
#define RENCODE_IB_PARAM_FEEDBACK_BUFFER 0x00000015
#define RENCODE_IB_PARAM_EFC_CONFIG 0x0000000e
#define RENCODE_HEVC_IB_PARAM_SLICE_CONTROL 0x00100001
#define RENCODE_HEVC_IB_PARAM_SPEC_MISC 0x00100002
@@ -67,6 +64,15 @@
#define RENCODE_H264_IB_PARAM_ENCODE_PARAMS 0x00200003
#define RENCODE_H264_IB_PARAM_DEBLOCKING_FILTER 0x00200004
#define RENCODE_COLOR_VOLUME_G22_BT709 0
#define RENCODE_COLOR_VOLUME_G10_BT2020 3
#define RENCODE_COLOR_BIT_DEPTH_8_BIT 0
#define RENCODE_COLOR_BIT_DEPTH_10_BIT 1
#define RENCODE_COLOR_PACKING_FORMAT_NV12 0
#define RENCODE_COLOR_PACKING_FORMAT_P010 1
static void radeon_enc_op_balance(struct radeon_encoder *enc)
{
RADEON_ENC_BEGIN(RENCODE_IB_OP_SET_BALANCE_ENCODING_MODE);
@@ -382,75 +388,43 @@ static void radeon_enc_nalu_pps_hevc(struct radeon_encoder *enc)
RADEON_ENC_END();
}
static void radeon_enc_session_init(struct radeon_encoder *enc)
{
enc->enc_pic.session_init.encode_standard = RENCODE_ENCODE_STANDARD_H264;
enc->enc_pic.session_init.aligned_picture_width = align(enc->base.width, 16);
enc->enc_pic.session_init.aligned_picture_height = align(enc->base.height, 16);
enc->enc_pic.session_init.padding_width = enc->enc_pic.session_init.aligned_picture_width - enc->base.width;
enc->enc_pic.session_init.padding_height = enc->enc_pic.session_init.aligned_picture_height - enc->base.height;
enc->enc_pic.session_init.pre_encode_mode = RENCODE_PREENCODE_MODE_NONE;
enc->enc_pic.session_init.pre_encode_chroma_enabled = FALSE;
RADEON_ENC_BEGIN(enc->cmd.session_init);
RADEON_ENC_CS(enc->enc_pic.session_init.encode_standard);
RADEON_ENC_CS(enc->enc_pic.session_init.aligned_picture_width);
RADEON_ENC_CS(enc->enc_pic.session_init.aligned_picture_height);
RADEON_ENC_CS(enc->enc_pic.session_init.padding_width);
RADEON_ENC_CS(enc->enc_pic.session_init.padding_height);
RADEON_ENC_CS(enc->enc_pic.session_init.pre_encode_mode);
RADEON_ENC_CS(enc->enc_pic.session_init.pre_encode_chroma_enabled);
RADEON_ENC_END();
}
static void radeon_enc_efc_config(struct radeon_encoder *enc)
{
if (enc->efc == NULL) {
enc->efc = CALLOC_STRUCT(rvid_buffer);
int buffer_size = 46 * 1024;
if (!si_vid_create_buffer(enc->screen, enc->efc, buffer_size, PIPE_USAGE_DYNAMIC)) {
RVID_ERR("Can't create EFC conversion table buffer.\n");
FREE(enc->efc);
return;
}
uint32_t *ptr = enc->ws->buffer_map(enc->ws, enc->efc->res->buf, &enc->cs, PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
memcpy(ptr, Yuv_st2084_rec2020_st2084_rec2020_2000, 46817);
enc->ws->buffer_unmap(enc->ws, enc->efc->res->buf);
}
enc->enc_pic.efc_params.coef_buffer_size = 46817;
enc->enc_pic.efc_params.cm_program_register_data_size = 1728;
assert(enc->efc);
RADEON_ENC_BEGIN(enc->cmd.efc_params);
RADEON_ENC_WRITE(enc->efc->res->buf, enc->efc->res->domains, 0x0);
RADEON_ENC_CS(enc->enc_pic.efc_params.coef_buffer_size);
RADEON_ENC_CS(enc->enc_pic.efc_params.cm_program_register_data_size);
RADEON_ENC_END();
}
static void radeon_enc_input_format(struct radeon_encoder *enc)
{
RADEON_ENC_BEGIN(enc->cmd.input_format);
RADEON_ENC_CS(enc->enc_pic.input_format.input_color_volume);
RADEON_ENC_CS(enc->enc_pic.input_format.input_color_space);
RADEON_ENC_CS(enc->enc_pic.input_format.input_color_range);
RADEON_ENC_CS(enc->enc_pic.input_format.input_chroma_subsampling);
RADEON_ENC_CS(enc->enc_pic.input_format.input_chroma_location);
RADEON_ENC_CS(enc->enc_pic.input_format.input_color_bit_depth);
RADEON_ENC_CS(enc->enc_pic.input_format.input_color_packing_format);
if (enc->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
RADEON_ENC_CS(RENCODE_COLOR_VOLUME_G10_BT2020);
RADEON_ENC_CS(0);
RADEON_ENC_CS(0);
RADEON_ENC_CS(0);
RADEON_ENC_CS(0);
RADEON_ENC_CS(RENCODE_COLOR_BIT_DEPTH_10_BIT);
RADEON_ENC_CS(RENCODE_COLOR_PACKING_FORMAT_P010);
} else {
RADEON_ENC_CS(RENCODE_COLOR_VOLUME_G22_BT709);
RADEON_ENC_CS(0);
RADEON_ENC_CS(0);
RADEON_ENC_CS(0);
RADEON_ENC_CS(0);
RADEON_ENC_CS(RENCODE_COLOR_BIT_DEPTH_8_BIT);
RADEON_ENC_CS(RENCODE_COLOR_PACKING_FORMAT_NV12);
}
RADEON_ENC_END();
}
static void radeon_enc_output_format(struct radeon_encoder *enc)
{
RADEON_ENC_BEGIN(enc->cmd.output_format);
RADEON_ENC_CS(enc->enc_pic.output_format.output_color_volume);
RADEON_ENC_CS(enc->enc_pic.output_format.output_color_range);
RADEON_ENC_CS(enc->enc_pic.output_format.output_chroma_location);
RADEON_ENC_CS(enc->enc_pic.output_format.output_color_bit_depth);
if (enc->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
RADEON_ENC_CS(RENCODE_COLOR_VOLUME_G10_BT2020);
RADEON_ENC_CS(0);
RADEON_ENC_CS(0);
RADEON_ENC_CS(RENCODE_COLOR_BIT_DEPTH_10_BIT);
} else {
RADEON_ENC_CS(RENCODE_COLOR_VOLUME_G22_BT709);
RADEON_ENC_CS(0);
RADEON_ENC_CS(0);
RADEON_ENC_CS(RENCODE_COLOR_BIT_DEPTH_8_BIT);
}
RADEON_ENC_END();
}
@@ -460,7 +434,7 @@ static void encode(struct radeon_encoder *enc)
enc->session_info(enc);
enc->total_task_size = 0;
enc->task_info(enc, enc->need_feedback);
enc->efc_params(enc);
enc->encode_headers(enc);
enc->ctx(enc);
enc->bitstream(enc);
@@ -480,11 +454,7 @@ void radeon_enc_2_0_init(struct radeon_encoder *enc)
enc->encode = encode;
enc->input_format = radeon_enc_input_format;
enc->output_format = radeon_enc_output_format;
enc->efc_params = radeon_enc_efc_config;
if (u_reduce_video_profile(enc->base.profile) == PIPE_VIDEO_FORMAT_MPEG4_AVC) {
enc->session_init = radeon_enc_session_init;
}
if (u_reduce_video_profile(enc->base.profile) == PIPE_VIDEO_FORMAT_HEVC) {
enc->deblocking_filter = radeon_enc_loop_filter_hevc;
enc->nalu_sps = radeon_enc_nalu_sps_hevc;
@@ -518,7 +488,6 @@ void radeon_enc_2_0_init(struct radeon_encoder *enc)
enc->cmd.spec_misc_h264 = RENCODE_H264_IB_PARAM_SPEC_MISC;
enc->cmd.enc_params_h264 = RENCODE_H264_IB_PARAM_ENCODE_PARAMS;
enc->cmd.deblocking_filter_h264 = RENCODE_H264_IB_PARAM_DEBLOCKING_FILTER;
enc->cmd.efc_params = RENCODE_IB_PARAM_EFC_CONFIG;
enc->enc_pic.session_info.interface_version =
((RENCODE_FW_INTERFACE_MAJOR_VERSION << RENCODE_IF_MAJOR_VERSION_SHIFT) |

4
src/gallium/drivers/radeonsi/si_get.c
View File

@@ -618,10 +618,6 @@ static int si_get_video_param(struct pipe_screen *screen, enum pipe_video_profil
return 4;
else
return 0;
case PIPE_VIDEO_CAP_EFC_SUPPORTED:
return ((sscreen->info.family >= CHIP_RENOIR) &&
(sscreen->info.family < CHIP_NAVI21) &&
!(sscreen->debug_flags & DBG(NO_EFC)));
default:
return 0;
}