radeonsi/gfx10: move s_sendmsg gs_alloc_req to the beginning of shaders
This will allow us to merge some IF blocks in shaders. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
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@@ -123,6 +123,13 @@ static LLVMValueRef ngg_get_vertices_per_prim(struct si_shader_context *ctx,
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}
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}
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void gfx10_ngg_build_sendmsg_gs_alloc_req(struct si_shader_context *ctx)
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{
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ac_build_sendmsg_gs_alloc_req(&ctx->ac, get_wave_id_in_tg(ctx),
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ngg_get_vtx_cnt(ctx),
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ngg_get_prim_cnt(ctx));
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}
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static void build_streamout_vertex(struct si_shader_context *ctx,
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LLVMValueRef *so_buffer, LLVMValueRef *wg_offset_dw,
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unsigned stream, LLVMValueRef offset_vtx,
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@@ -646,9 +653,6 @@ void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
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ac_build_endif(&ctx->ac, 5400);
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}
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ac_build_sendmsg_gs_alloc_req(&ctx->ac, get_wave_id_in_tg(ctx),
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ngg_get_vtx_cnt(ctx), ngg_get_prim_cnt(ctx));
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/* Update query buffer */
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if (ctx->screen->use_ngg_streamout &&
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!info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD]) {
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@@ -2421,6 +2421,11 @@ static bool si_build_main_function(struct si_shader_context *ctx,
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(shader->key.as_ngg && !shader->key.as_es)))
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ac_init_exec_full_mask(&ctx->ac);
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if ((ctx->type == PIPE_SHADER_VERTEX ||
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ctx->type == PIPE_SHADER_TESS_EVAL) &&
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shader->key.as_ngg && !shader->key.as_es)
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gfx10_ngg_build_sendmsg_gs_alloc_req(ctx);
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if (ctx->type == PIPE_SHADER_TESS_CTRL ||
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ctx->type == PIPE_SHADER_GEOMETRY) {
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if (ctx->type == PIPE_SHADER_GEOMETRY && shader->key.as_ngg) {
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@@ -299,6 +299,7 @@ void si_llvm_emit_streamout(struct si_shader_context *ctx,
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unsigned noutput, unsigned stream);
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void si_create_function(struct si_shader_context *ctx);
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void gfx10_ngg_build_sendmsg_gs_alloc_req(struct si_shader_context *ctx);
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void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
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unsigned max_outputs,
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LLVMValueRef *addrs);
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