OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

compiler: Move from nir_scope to mesa_scope

Browse Source 
Just moving the enum and performing renames, no behavior change.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
This commit is contained in:
Caio Oliveira
2023-05-30 12:05:30 -07:00
committed by Marge Bot
parent 4d26b38caf
commit 59cc77f0fa
52 changed files with 236 additions and 235 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
src/intel/compiler/brw_fs_nir.cpp
View File

@@ -2756,9 +2756,9 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld,
break;
case nir_intrinsic_scoped_barrier:
if (nir_intrinsic_memory_scope(instr) != NIR_SCOPE_NONE)
if (nir_intrinsic_memory_scope(instr) != SCOPE_NONE)
nir_emit_intrinsic(bld, instr);
if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP) {
if (nir_intrinsic_execution_scope(instr) == SCOPE_WORKGROUP) {
if (tcs_prog_data->instances != 1)
emit_tcs_barrier();
}
@@ -3684,9 +3684,9 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld,
switch (instr->intrinsic) {
case nir_intrinsic_scoped_barrier:
if (nir_intrinsic_memory_scope(instr) != NIR_SCOPE_NONE)
if (nir_intrinsic_memory_scope(instr) != SCOPE_NONE)
nir_emit_intrinsic(bld, instr);
if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP) {
if (nir_intrinsic_execution_scope(instr) == SCOPE_WORKGROUP) {
/* The whole workgroup fits in a single HW thread, so all the
* invocations are already executed lock-step. Instead of an actual
* barrier just emit a scheduling fence, that will generate no code.
@@ -4297,19 +4297,19 @@ lsc_fence_descriptor_for_intrinsic(const struct intel_device_info *devinfo,
if (nir_intrinsic_has_memory_scope(instr)) {
switch (nir_intrinsic_memory_scope(instr)) {
case NIR_SCOPE_DEVICE:
case NIR_SCOPE_QUEUE_FAMILY:
case SCOPE_DEVICE:
case SCOPE_QUEUE_FAMILY:
scope = LSC_FENCE_TILE;
flush_type = LSC_FLUSH_TYPE_EVICT;
break;
case NIR_SCOPE_WORKGROUP:
case SCOPE_WORKGROUP:
scope = LSC_FENCE_THREADGROUP;
flush_type = LSC_FLUSH_TYPE_EVICT;
break;
case NIR_SCOPE_SHADER_CALL:
case NIR_SCOPE_INVOCATION:
case NIR_SCOPE_SUBGROUP:
case NIR_SCOPE_NONE:
case SCOPE_SHADER_CALL:
case SCOPE_INVOCATION:
case SCOPE_SUBGROUP:
case SCOPE_NONE:
break;
}
} else {
@@ -4523,7 +4523,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
slm_fence = modes & nir_var_mem_shared;
tgm_fence = modes & nir_var_image;
urb_fence = modes & (nir_var_shader_out | nir_var_mem_task_payload);
if (nir_intrinsic_memory_scope(instr) != NIR_SCOPE_NONE)
if (nir_intrinsic_memory_scope(instr) != SCOPE_NONE)
opcode = SHADER_OPCODE_MEMORY_FENCE;
break;
}

2
src/intel/compiler/brw_mesh.cpp
View File

@@ -704,7 +704,7 @@ brw_nir_initialize_mue(nir_shader *nir,
* may start filling MUE before other finished initializing.
*/
if (workgroup_size > dispatch_width) {
nir_scoped_barrier(&b, NIR_SCOPE_WORKGROUP, NIR_SCOPE_WORKGROUP,
nir_scoped_barrier(&b, SCOPE_WORKGROUP, SCOPE_WORKGROUP,
NIR_MEMORY_ACQ_REL, nir_var_shader_out);
}

4
src/intel/compiler/brw_nir.c
View File

@@ -1356,8 +1356,8 @@ bool combine_all_memory_barriers(nir_intrinsic_instr *a,
void *data)
{
/* Only combine pure memory barriers */
if ((nir_intrinsic_execution_scope(a) != NIR_SCOPE_NONE) ||
(nir_intrinsic_execution_scope(b) != NIR_SCOPE_NONE))
if ((nir_intrinsic_execution_scope(a) != SCOPE_NONE) ||
(nir_intrinsic_execution_scope(b) != SCOPE_NONE))
return false;
/* Translation to backend IR will get rid of modes we don't care about, so

2
src/intel/compiler/brw_vec4_nir.cpp
View File

@@ -707,7 +707,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
}
case nir_intrinsic_scoped_barrier: {
if (nir_intrinsic_memory_scope(instr) == NIR_SCOPE_NONE)
if (nir_intrinsic_memory_scope(instr) == SCOPE_NONE)
break;
const vec4_builder bld =
vec4_builder(this).at_end().annotate(current_annotation, base_ir);

4
src/intel/compiler/brw_vec4_tcs.cpp
View File

@@ -305,9 +305,9 @@ vec4_tcs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
}
case nir_intrinsic_scoped_barrier:
if (nir_intrinsic_memory_scope(instr) != NIR_SCOPE_NONE)
if (nir_intrinsic_memory_scope(instr) != SCOPE_NONE)
vec4_visitor::nir_emit_intrinsic(instr);
if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP) {
if (nir_intrinsic_execution_scope(instr) == SCOPE_WORKGROUP) {
dst_reg header = dst_reg(this, glsl_type::uvec4_type);
emit(TCS_OPCODE_CREATE_BARRIER_HEADER, header);
emit(SHADER_OPCODE_BARRIER, dst_null_ud(), src_reg(header));