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nir/print: Use BITSIZExELEMENTS for SSA sizes

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Omits the `x1` part if its one element.

```
32x3   %3 = @load_deref (%0) (access=0)
32     %4 = mov %3.x
32     %5 = deref_var &gl_LocalInvocationID (system uvec3)
32x3   %8 = @load_deref (%5) (access=0)
32     %9 = mov %8.x
```

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
This commit is contained in:
Caio Oliveira
2023-06-09 12:12:13 -07:00
committed by Marge Bot
parent 252a6140ea
commit 58e3abc4a3
1 changed files with 9 additions and 7 deletions
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16
src/compiler/nir/nir_print.c
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@@ -93,10 +93,11 @@ print_register(nir_register *reg, print_state *state)
fprintf(fp, "r%u", reg->index);
}
static const char *sizes[] = { "error", "vec1", "vec2", "vec3", "vec4",
"vec5", "error", "error", "vec8",
"error", "error", "error", "error",
"error", "error", "error", "vec16"};
/* For 1 element, the size is intentionally omitted. */
static const char *sizes[] = { "x??", " ", "x2 ", "x3 ", "x4 ",
"x5 ", "x??", "x??", "x8 ",
"x??", "x??", "x??", "x??",
"x??", "x??", "x??", "x16"};
static const char *
divergence_status(print_state *state, bool divergent)
@@ -111,8 +112,8 @@ static void
print_register_decl(nir_register *reg, print_state *state)
{
FILE *fp = state->fp;
fprintf(fp, "decl_reg %s %u %s", sizes[reg->num_components],
reg->bit_size, divergence_status(state, reg->divergent));
fprintf(fp, "decl_reg %u%s %s", reg->bit_size,
sizes[reg->num_components], divergence_status(state, reg->divergent));
print_register(reg, state);
if (reg->num_array_elems != 0)
@@ -125,7 +126,8 @@ print_ssa_def(nir_ssa_def *def, print_state *state)
{
FILE *fp = state->fp;
fprintf(fp, "%s %2u %s%%%u", sizes[def->num_components], def->bit_size,
fprintf(fp, "%u%s%s %s%%%u", def->bit_size, sizes[def->num_components],
def->bit_size <= 8 ? " " : "",
divergence_status(state, def->divergent), def->index);
}