radeonsi: clean up how internal compute dispatches are handled
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Cc: 19.3 <mesa-stable@lists.freedesktop.org>
This commit is contained in:
@@ -59,15 +59,18 @@ unsigned si_get_flush_flags(struct si_context *sctx, enum si_coherency coher,
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}
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}
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static void si_compute_internal_begin(struct si_context *sctx)
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static void si_launch_grid_internal(struct si_context *sctx,
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struct pipe_grid_info *info)
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{
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/* Set settings for driver-internal compute dispatches. */
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sctx->flags &= ~SI_CONTEXT_START_PIPELINE_STATS;
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sctx->flags |= SI_CONTEXT_STOP_PIPELINE_STATS;
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sctx->render_cond_force_off = true;
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}
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static void si_compute_internal_end(struct si_context *sctx)
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{
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/* Dispatch compute. */
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sctx->b.launch_grid(&sctx->b, info);
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/* Restore default settings. */
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sctx->flags &= ~SI_CONTEXT_STOP_PIPELINE_STATS;
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sctx->flags |= SI_CONTEXT_START_PIPELINE_STATS;
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sctx->render_cond_force_off = false;
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@@ -89,8 +92,6 @@ static void si_compute_clear_12bytes_buffer(struct si_context *sctx,
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unsigned data[4] = {0};
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memcpy(data, clear_value, 12);
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si_compute_internal_begin(sctx);
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sctx->flags |= SI_CONTEXT_PS_PARTIAL_FLUSH |
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SI_CONTEXT_CS_PARTIAL_FLUSH |
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si_get_flush_flags(sctx, coher, SI_COMPUTE_DST_CACHE_POLICY);
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@@ -134,13 +135,12 @@ static void si_compute_clear_12bytes_buffer(struct si_context *sctx,
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info.grid[1] = 1;
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info.grid[2] = 1;
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ctx->launch_grid(ctx, &info);
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si_launch_grid_internal(sctx, &info);
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ctx->bind_compute_state(ctx, saved_cs);
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ctx->set_shader_buffers(ctx, PIPE_SHADER_COMPUTE, 0, 1, &saved_sb, saved_writable_mask);
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ctx->set_constant_buffer(ctx, PIPE_SHADER_COMPUTE, 0, &saved_cb);
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si_compute_internal_end(sctx);
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pipe_resource_reference(&saved_sb.buffer, NULL);
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pipe_resource_reference(&saved_cb.buffer, NULL);
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}
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@@ -164,7 +164,6 @@ static void si_compute_do_clear_or_copy(struct si_context *sctx,
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assert(dst->target != PIPE_BUFFER || dst_offset + size <= dst->width0);
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assert(!src || src_offset + size <= src->width0);
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si_compute_internal_begin(sctx);
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sctx->flags |= SI_CONTEXT_PS_PARTIAL_FLUSH |
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SI_CONTEXT_CS_PARTIAL_FLUSH |
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si_get_flush_flags(sctx, coher, SI_COMPUTE_DST_CACHE_POLICY);
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@@ -241,7 +240,7 @@ static void si_compute_do_clear_or_copy(struct si_context *sctx,
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ctx->bind_compute_state(ctx, sctx->cs_clear_buffer);
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}
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ctx->launch_grid(ctx, &info);
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si_launch_grid_internal(sctx, &info);
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enum si_cache_policy cache_policy = get_cache_policy(sctx, coher, size);
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sctx->flags |= SI_CONTEXT_CS_PARTIAL_FLUSH |
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@@ -254,7 +253,6 @@ static void si_compute_do_clear_or_copy(struct si_context *sctx,
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ctx->bind_compute_state(ctx, saved_cs);
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ctx->set_shader_buffers(ctx, PIPE_SHADER_COMPUTE, 0, src ? 2 : 1, saved_sb,
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saved_writable_mask);
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si_compute_internal_end(sctx);
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for (int i = 0; i < 2; i++)
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pipe_resource_reference(&saved_sb[i].buffer, NULL);
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}
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@@ -397,7 +395,6 @@ void si_compute_copy_image(struct si_context *sctx,
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if (width == 0 || height == 0)
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return;
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si_compute_internal_begin(sctx);
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sctx->flags |= SI_CONTEXT_CS_PARTIAL_FLUSH |
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si_get_flush_flags(sctx, SI_COHERENCY_SHADER, L2_STREAM);
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@@ -481,7 +478,7 @@ void si_compute_copy_image(struct si_context *sctx,
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info.grid[2] = depth;
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}
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ctx->launch_grid(ctx, &info);
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si_launch_grid_internal(sctx, &info);
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sctx->flags |= SI_CONTEXT_CS_PARTIAL_FLUSH |
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(sctx->chip_class <= GFX8 ? SI_CONTEXT_WB_L2 : 0) |
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@@ -489,7 +486,6 @@ void si_compute_copy_image(struct si_context *sctx,
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ctx->bind_compute_state(ctx, saved_cs);
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ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 2, saved_image);
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ctx->set_constant_buffer(ctx, PIPE_SHADER_COMPUTE, 0, &saved_cb);
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si_compute_internal_end(sctx);
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for (int i = 0; i < 2; i++)
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pipe_resource_reference(&saved_image[i].resource, NULL);
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pipe_resource_reference(&saved_cb.buffer, NULL);
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@@ -562,7 +558,7 @@ void si_retile_dcc(struct si_context *sctx, struct si_texture *tex)
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info.grid[2] = 1;
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info.last_block[0] = num_threads % 64;
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ctx->launch_grid(ctx, &info);
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si_launch_grid_internal(sctx, &info);
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/* Don't flush caches or wait. The driver will wait at the end of this IB,
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* and L2 will be flushed by the kernel fence.
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@@ -590,8 +586,6 @@ void si_compute_expand_fmask(struct pipe_context *ctx, struct pipe_resource *tex
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if (tex->nr_samples != tex->nr_storage_samples)
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return;
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si_compute_internal_begin(sctx);
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/* Flush caches and sync engines. */
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sctx->flags |= SI_CONTEXT_CS_PARTIAL_FLUSH |
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si_get_flush_flags(sctx, SI_COHERENCY_SHADER, L2_STREAM);
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@@ -632,7 +626,7 @@ void si_compute_expand_fmask(struct pipe_context *ctx, struct pipe_resource *tex
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info.grid[1] = DIV_ROUND_UP(tex->height0, 8);
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info.grid[2] = is_array ? tex->array_size : 1;
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ctx->launch_grid(ctx, &info);
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si_launch_grid_internal(sctx, &info);
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/* Flush caches and sync engines. */
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sctx->flags |= SI_CONTEXT_CS_PARTIAL_FLUSH |
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@@ -642,7 +636,6 @@ void si_compute_expand_fmask(struct pipe_context *ctx, struct pipe_resource *tex
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/* Restore previous states. */
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ctx->bind_compute_state(ctx, saved_cs);
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ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 1, &saved_image);
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si_compute_internal_end(sctx);
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pipe_resource_reference(&saved_image.resource, NULL);
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/* Array of fully expanded FMASK values, arranged by [log2(fragments)][log2(samples)-1]. */
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@@ -693,7 +686,6 @@ void si_compute_clear_render_target(struct pipe_context *ctx,
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memcpy(data + 4, color->ui, sizeof(color->ui));
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}
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si_compute_internal_begin(sctx);
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sctx->render_cond_force_off = !render_condition_enabled;
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sctx->flags |= SI_CONTEXT_CS_PARTIAL_FLUSH |
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@@ -753,7 +745,7 @@ void si_compute_clear_render_target(struct pipe_context *ctx,
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info.grid[2] = 1;
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}
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ctx->launch_grid(ctx, &info);
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si_launch_grid_internal(sctx, &info);
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sctx->flags |= SI_CONTEXT_CS_PARTIAL_FLUSH |
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(sctx->chip_class <= GFX8 ? SI_CONTEXT_WB_L2 : 0) |
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@@ -761,7 +753,6 @@ void si_compute_clear_render_target(struct pipe_context *ctx,
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ctx->bind_compute_state(ctx, saved_cs);
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ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 1, &saved_image);
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ctx->set_constant_buffer(ctx, PIPE_SHADER_COMPUTE, 0, &saved_cb);
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si_compute_internal_end(sctx);
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pipe_resource_reference(&saved_image.resource, NULL);
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pipe_resource_reference(&saved_cb.buffer, NULL);
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}
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